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authorFabio Estevam <fabio.estevam@freescale.com>2013-01-04 16:07:26 +0000
committerStefano Babic <sbabic@denx.de>2013-01-09 19:22:06 +0100
commit2b16e51c2ff1073592a3a3f52a6725bdd7b11f81 (patch)
tree7730651abc9bdf6908eb9324bd3feb515ee91969
parent7528cf5f016b5b8b8b12b373f6f31a10bf89233d (diff)
downloadu-boot-linaro-stable-2b16e51c2ff1073592a3a3f52a6725bdd7b11f81.tar.gz
mx6: Add workaround for ARM errata
Add workaround for the following ARM errata: 743622 and 751472. The motivation for this change is the following kernel commit 62e4d357a (ARM: 7609/1: disable errata work-arounds which access secure registers), which removes the errata from multiplatform kernel. Since imx has been converted to multiplatform in the kernel, we need to apply such workarounds into the bootloader. Workaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel. Explanation of each erratum is provided at "Chip Errata for the i.MX 6Dual/6Quad" document available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-rw-r--r--arch/arm/cpu/armv7/mx6/lowlevel_init.S10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/lowlevel_init.S b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
index acadef221..7b60ca745 100644
--- a/arch/arm/cpu/armv7/mx6/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx6/lowlevel_init.S
@@ -20,6 +20,16 @@
#include <linux/linkage.h>
+.macro init_arm_errata
+ /* ARM erratum ID #743622 */
+ mrc p15, 0, r10, c15, c0, 1 /* read diagnostic register */
+ orr r10, r10, #1 << 6 /* set bit #6 */
+ /* ARM erratum ID #751472 */
+ orr r10, r10, #1 << 11 /* set bit #11 */
+ mcr p15, 0, r10, c15, c0, 1 /* write diagnostic register */
+.endm
+
ENTRY(lowlevel_init)
+ init_arm_errata
mov pc, lr
ENDPROC(lowlevel_init)