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authorKim Phillips <kim.phillips@freescale.com>2009-08-21 16:33:15 -0500
committerKim Phillips <kim.phillips@freescale.com>2009-08-21 17:11:44 -0500
commit8eceeb7fd656d6d071c0a8b615e178aca5775fff (patch)
tree4f7064c347e1c268f4a78eba73465ca50e067388
parent27c5248dd4c9ba4a36899689595956c5e59e349a (diff)
downloadu-boot-linaro-stable-8eceeb7fd656d6d071c0a8b615e178aca5775fff.tar.gz
mpc83xx: mpc8377erdb - change DDR settings to those from latest bsp
when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot at either: NET: Registered protocol family 16 or the io scheduler cfq registered message. Fixing up these DDR settings appears to fix the problem. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
-rw-r--r--include/configs/MPC837XERDB.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index b637f7395..ca89b9be4 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -190,8 +190,8 @@
/* 0x3937d322 */
#define CONFIG_SYS_DDR_TIMING_2 0x02984cc8
-#define CONFIG_SYS_DDR_INTERVAL ((1545 << SDRAM_INTERVAL_REFINT_SHIFT) \
- | (256 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
+#define CONFIG_SYS_DDR_INTERVAL ((1024 << SDRAM_INTERVAL_REFINT_SHIFT) \
+ | (0 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
/* 0x06090100 */
#if defined(CONFIG_DDR_2T_TIMING)
@@ -205,7 +205,7 @@
/* 0x43000000 */
#endif
#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */
-#define CONFIG_SYS_DDR_MODE ((0x0440 << SDRAM_MODE_ESD_SHIFT) \
+#define CONFIG_SYS_DDR_MODE ((0x0406 << SDRAM_MODE_ESD_SHIFT) \
| (0x0442 << SDRAM_MODE_SD_SHIFT))
/* 0x04400442 */ /* DDR400 */
#define CONFIG_SYS_DDR_MODE2 0x00000000