diff options
| author | Jim Lin <jilin@nvidia.com> | 2012-06-24 20:40:57 +0000 |
|---|---|---|
| committer | Albert ARIBAUD (U-Boot) <uboot@lilith.(none)> | 2012-07-09 22:44:34 +0200 |
| commit | 8b3f7bf7ec95816a7d2f89331e8877a351b3ec7c (patch) | |
| tree | 0654a0768aa8d8dbb8afa70fd3ab96fcea313b4d | |
| parent | 2db7b952844f95c8299bb84bc3b2d38e8f48f5cd (diff) | |
tegra: usb: Fix device enumeration problem of USB1
A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like "usb reset" in u-boot command line).
This will be treated as an error and stops later device enumeration.
Therefore we clear that bit after Port Reset in order to proceed
later device enumeration.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | arch/arm/include/asm/arch-tegra2/tegra2.h | 1 | ||||
| -rw-r--r-- | drivers/usb/host/ehci-tegra.c | 18 |
2 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h b/arch/arm/include/asm/arch-tegra2/tegra2.h index 3c8d8a84b..13d68c017 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2.h +++ b/arch/arm/include/asm/arch-tegra2/tegra2.h @@ -45,6 +45,7 @@ #define NV_PA_CSITE_BASE 0x70040000 #define TEGRA_USB1_BASE 0xC5000000 #define TEGRA_USB3_BASE 0xC5008000 +#define TEGRA_USB_ADDR_MASK 0xFFFFC000 #define TEGRA2_SDRC_CS0 NV_PA_SDRAM_BASE #define LOW_LEVEL_SRAM_STACK 0x4000FFFC diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index a7e105b99..4646b2950 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009 NVIDIA Corporation + * Copyright (c) 2009-2012 NVIDIA Corporation * * See file CREDITS for list of people who contributed to this * project. @@ -29,6 +29,22 @@ #include <asm/errno.h> #include <asm/arch/usb.h> +/* + * A known hardware issue where Connect Status Change bit of PORTSC register + * of USB1 controller will be set after Port Reset. + * We have to clear it in order for later device enumeration to proceed. + * This ehci_powerup_fixup overrides the weak function ehci_powerup_fixup + * in "ehci-hcd.c". + */ +void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) +{ + mdelay(50); + if (((u32) status_reg & TEGRA_USB_ADDR_MASK) != TEGRA_USB1_BASE) + return; + /* For EHCI_PS_CSC to be cleared in ehci_hcd.c */ + if (ehci_readl(status_reg) & EHCI_PS_CSC) + *reg |= EHCI_PS_CSC; +} /* * Create the appropriate control structures to manage |