BOARD: HBI0191
TITLE: V2P-CA9 Configuration File

; Do not place comments within the [SECTION] blocks.

[DCCS]
TOTALDCCS: 1                    ;(1) Total Number of DCCS - Do not change this value
M0FILE: dbb_v114.ebf 		;DCC0 Filename
M0MODE: MICRO                   ;DCC0 Programming Mode

[FPGAS]
TOTALFPGAS: 0                   ;(0) - Do not change this value
F0FILE: NONE                    ;FPGA0 Filename
F0MODE: NONE                    ;FPGA0 Programming Mode

[TAPS]
TOTALTAPS: 6                    ;(6) - Do not change this value
T0NAME: STM32TMC                ;TAP0 Device Name
T0FILE: NONE                    ;TAP0 Filename
T0MODE: NONE                    ;TAP0 Programming Mode
T1NAME: STM32CM3                ;TAP1 Device Name
T1FILE: NONE                    ;TAP1 Filename
T1MODE: NONE                    ;TAP1 Programming Mode
T2NAME: ispCLOCK5610V           ;TAP2 Device Name
T2FILE: ispm_1v.svf  		;TAP2 Filename
T2MODE: PLD                     ;TAP2 Programming Mode
T3NAME: ispCLOCK5610V           ;TAP3 Device Name
T3FILE: isps_1v.svf  		;TAP3 Filename
T3MODE: PLD                     ;TAP3 Programming Mode
T4NAME: XC2C64A                 ;TAP4 Device Name
T4FILE: smbmux.svf              ;TAP4 Filename
T4MODE: PLD                     ;TAP4 Programming Mode
T5NAME: XC2C64A                 ;TAP5 Device Name
T5FILE: vconvb.svf              ;TAP5 Filename
T5MODE: PLD                     ;TAP5 Programming Mode

[OSCCLKS]
TOTALOSCCLKS: 3                 ;Total Number of OSCCLKS (3) - Do not change this value
OSC0: 40.0                      ;OSC0 Frequency in MHz (EXTSAXICLK)
OSC1: 23.75                     ;OSC1 Frequency in MHz (CLCDCLK)
OSC2: 66.67                     ;OSC2 Frequency in MHz (TCREFCLK)

[SCC REGISTERS]
TOTALSCCS: 3		        ;Total Number of SCC registers defined
SCC: 0x000 0xBB8A802A           ;CFGRW0 Power up settings - MCLK, AXICLKs, FCLK PLL configuration
SCC: 0x004 0x00001F09           ;CFGRW1 Power up settings - Remap bits, A9 static signals, MCLK PLL
SCC: 0x008 0x00000000           ;CFGRW2 Power up settings - Misc, A9 static signals


; Alternative Clock options
;
; To use these values, copy the SCC: line and replace the lines in the [SCC REGISTERS] section above.
; Do not place comments between the [SCC REGISTERS] and the last SCC: line.

; Slow : FCLK = 80, FAXI = 80, SAXI = 40, MCLK = 160 ; @ OSC2 = 40 MHz
;SCC: 0x000 0xCFBF8A3C
;SCC: 0x004 0x00001F09

; Normal : FCLK = 400, FAXI=200, SAXI = 50, MCLK = 266 ; @ OSC2 = 66.67 MHz
;SCC: 0x000 0xBB8A802A
;SCC: 0x004 0x00001F09