From d8e764dff93cdb90064b222405901577bfb1ae29 Mon Sep 17 00:00:00 2001 From: Ryan Harkin Date: Thu, 6 Nov 2014 17:28:03 +0000 Subject: add board_recovery_image_0.9.2.zip Signed-off-by: Ryan Harkin --- SITE1/HBI0262B/board.txt | 21 +++++++++++++++++++++ SITE1/HBI0262B/images.txt | 36 ++++++++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+) create mode 100755 SITE1/HBI0262B/board.txt create mode 100755 SITE1/HBI0262B/images.txt (limited to 'SITE1') diff --git a/SITE1/HBI0262B/board.txt b/SITE1/HBI0262B/board.txt new file mode 100755 index 0000000..099680d --- /dev/null +++ b/SITE1/HBI0262B/board.txt @@ -0,0 +1,21 @@ +BOARD: HBI0262 +TITLE: V2M-Juno DevChip Configuration File + +[SCC REGISTERS] +TOTALSCCS: 11 ;Total Number of SCC registers +SCC: 0x054 0x0007FFFE ;Enable non-secure DMA operations +SCC: 0x05C 0x00FE001E ;Enable default GPU Texture Formats +SCC: 0x100 0x003F1000 ;A57 PLL Register 0 (800MHz) +SCC: 0x104 0x0001F300 ;A57 PLL Register 1 +SCC: 0x108 0x00371000 ;A53 PLL Register 0 (700MHz) +SCC: 0x10C 0x0001B300 ;A53 PLL Register 1 +SCC: 0x118 0x003F1000 ;SYS PLL Register 0 (1600MHz) +SCC: 0x11C 0x0001F100 ;SYS PLL Register 1 +SCC: 0x0F8 0x0BEC0000 ;BL1 entry point + +SCC: 0x00C 0x000000C2 ;Clock Control, TMIF2XCLK, Register 0xC1 = default + ;[3:0] CLKSEL : 0 Output gated, 1 AON_REF_CLK, 2 SYSCLK + ;[7:4] CLKDIV : Clock divider -1 (0 give a division of 1) +SCC: 0x010 0x000000C2 ;Clock Control, TSIF2XCLK, Register 0xC1 = default + ;[3:0] CLKSEL : 0 Output gated, 1 AON_REF_CLK, 2 SYSCLK + ;[7:4] CLKDIV : Clock divider -1 (0 give a division of 1) diff --git a/SITE1/HBI0262B/images.txt b/SITE1/HBI0262B/images.txt new file mode 100755 index 0000000..06f4753 --- /dev/null +++ b/SITE1/HBI0262B/images.txt @@ -0,0 +1,36 @@ +TITLE: Versatile Express Images Configuration File + +[IMAGES] +TOTALIMAGES: 5 ;Number of Images (Max: 32) + +NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE +NOR0ADDRESS: 0x00000000 ;Image Flash Address +NOR0FILE: \SOFTWARE\fip.bin ;Image File Name +NOR0LOAD: 00000000 ;Image Load Address +NOR0ENTRY: 00000000 ;Image Entry Point + +NOR1UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE +NOR1ADDRESS: 0x03EC0000 ;Image Flash Address +NOR1FILE: \SOFTWARE\bl1.bin ;Image File Name +NOR1LOAD: 00000000 ;Image Load Address +NOR1ENTRY: 00000000 ;Image Entry Point + +NOR2UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE +NOR2ADDRESS: 0x00500000 ;Image Flash Address +NOR2FILE: \SOFTWARE\Image ;Image File Name +NOR2LOAD: 00000000 ;Image Load Address +NOR2ENTRY: 00000000 ;Image Entry Point + +NOR3UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE +NOR3ADDRESS: 0x00F00000 ;Image Flash Address +NOR3FILE: \SOFTWARE\juno.dtb ;Image File Name +NOR3NAME: juno.dtb ;Specify target filename to preserve file extension +NOR3LOAD: 00000000 ;Image Load Address +NOR3ENTRY: 00000000 ;Image Entry Point + +NOR4UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE +NOR4ADDRESS: 0x025C0000 ;Image Flash Address +NOR4FILE: \SOFTWARE\hdlcdclk.dat ;Image File Name +NOR4LOAD: 00000000 ;Image Load Address +NOR4ENTRY: 00000000 ;Image Entry Point + -- cgit v1.2.3