From bc88b1dba90d0a5de8178582aeb67cf17291fb91 Mon Sep 17 00:00:00 2001 From: Ryan Harkin Date: Fri, 20 Jun 2014 15:05:27 +0100 Subject: add board_recovery_image_0.5 Signed-off-by: Ryan Harkin --- MB/HBI0262B/board.txt | 26 +++++++++++++ MB/HBI0262B/io_b013.bit | Bin 0 -> 1484511 bytes MB/HBI0262B/io_b113.bit | Bin 0 -> 1484510 bytes MB/HBI0262B/mbb_v113.ebf | Bin 0 -> 201748 bytes MB/HBI0262B/pms_v101.bin | Bin 0 -> 1024 bytes MB/HBI0262B/tapid.arm | 97 +++++++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 123 insertions(+) create mode 100644 MB/HBI0262B/board.txt create mode 100644 MB/HBI0262B/io_b013.bit create mode 100644 MB/HBI0262B/io_b113.bit create mode 100644 MB/HBI0262B/mbb_v113.ebf create mode 100644 MB/HBI0262B/pms_v101.bin create mode 100644 MB/HBI0262B/tapid.arm (limited to 'MB/HBI0262B') diff --git a/MB/HBI0262B/board.txt b/MB/HBI0262B/board.txt new file mode 100644 index 0000000..e1f92c0 --- /dev/null +++ b/MB/HBI0262B/board.txt @@ -0,0 +1,26 @@ +BOARD: HBI0262 +TITLE: MotherBoard Configuration File + +[MCCS] +MBBIOS: mbb_v113.ebf ;MB BIOS IMAGE + +[FPGAS] +MBIOFPGA: io_b113.bit ;MB IOFPGA + +[PMIC] +MBPMIC: pms_v101.bin ;MB PMIC + +[OSCCLKS] +TOTALOSCCLKS: 11 +OSC0: 50.0 ;OSC0 Juno SYSREFCLK (System clock) +OSC1: 50.0 ;OSC1 Juno AONREFCLK (Always On) +OSC2: 50.0 ;OSC2 Juno PXLREFCLK (HS pixel clock) +OSC3: 47.5 ;OSC3 Juno PXCLKIN (LS pixel clock) +OSC4: 75.0 ;OSC4 Juno I2SCLK (Audio) +OSC5: 50.0 ;OSC5 Juno SMCMCLK (Static memory) +OSC6: 50.0 ;OSC6 Juno CA53 REF_CLK (RSVD) +OSC7: 50.0 ;OSC7 Juno CA57 REF_CLK (RSVD) +OSC8: 50.0 ;OSC8 Juno GPU REF_CLK (RSVD) +OSC9: 30.0 ;OSC9 IOFPGA BOOT (RSVD) +OSC10: 24.0 ;OSC10 IOFPGA UART (RSVD) +OSC11: 7.27 ;OSC11 Juno UARTCLK (UART clock) diff --git a/MB/HBI0262B/io_b013.bit b/MB/HBI0262B/io_b013.bit new file mode 100644 index 0000000..32d6900 Binary files /dev/null and b/MB/HBI0262B/io_b013.bit differ diff --git a/MB/HBI0262B/io_b113.bit b/MB/HBI0262B/io_b113.bit new file mode 100644 index 0000000..98963f7 Binary files /dev/null and b/MB/HBI0262B/io_b113.bit differ diff --git a/MB/HBI0262B/mbb_v113.ebf b/MB/HBI0262B/mbb_v113.ebf new file mode 100644 index 0000000..c38a5b9 Binary files /dev/null and b/MB/HBI0262B/mbb_v113.ebf differ diff --git a/MB/HBI0262B/pms_v101.bin b/MB/HBI0262B/pms_v101.bin new file mode 100644 index 0000000..e8c6106 Binary files /dev/null and b/MB/HBI0262B/pms_v101.bin differ diff --git a/MB/HBI0262B/tapid.arm b/MB/HBI0262B/tapid.arm new file mode 100644 index 0000000..2d94325 --- /dev/null +++ b/MB/HBI0262B/tapid.arm @@ -0,0 +1,97 @@ +# ARM TAP controller IR register lengths file +# +# Copyright (C) 2008 ARM Limited. All rights reserved. +# +# This file contains a definition of the devices names, ID codes, ID code mask +# and IR lengths for devices used on ARM boards. This file is read by the +# progcards_usb.exe program and used to determine if a device ID is valid and +# the corresponding IR length. A device that is not recognized will be display +# as 'UNKOWN' and device details should be added to this file. +# +# DEVICE NAME ID CODE ID MASK IR LENGTH +# ------------- ---------- ---------- --------- + +# XILINX PLDs + +XC9572 0x09504093 0x0FFFFFFF 8 +XC9536XL 0x29602093 0x0FFFFFFF 8 +XC9572XL 0x09604093 0x0FFFFFFF 8 +XC95288XL 0x09616093 0x0FFFFFFF 8 +XCR3256XL 0xF494FFFF 0x0FFF8001 4 +XC4036XLA 0x00224093 0x00FFFFFF 3 +XC4062XLA 0x00230093 0x00FFFFFF 3 +XC4085XLA 0x00238093 0x00FFFFFF 3 +XC2C32A 0x06E1C093 0x0FFF0FFF 8 +XC2C64A 0x06E5D093 0x0FFF0FFF 8 +XC2C128 0x06D8A093 0x0FFF0FFF 8 +XC2C256 0x16D4c093 0x0FFF0FFF 8 +XC2C384 0x06D5C093 0x0FFF0FFF 8 + +# XILINX FPGAs + +XCV600 0x10630093 0x00FFFFFF 5 +XCV600E 0x90A30093 0x00FFFFFF 5 +XCV1000 0x40640093 0x0FFFFFFF 5 +XCV2000E 0xF0A50093 0x0FFFFFFF 5 +XC2V2000 0x01038093 0x0FFFFFFF 6 +XC2V6000 0x31060093 0x0FFFFFFF 6 +XC2V8000 0x01070093 0x0FFFFFFF 6 +XC4VLX40 0x316A4093 0x0FFFFFFF 10 +XC4VLX160 0x01718093 0x0FFFFFFF 10 +XC4VLX200 0x01734093 0x0FFFFFFF 10 +XC5VLX50T 0x02A96093 0x0FFFFFFF 10 +XC5VLX110 0x228D6093 0x0FFFFFFF 10 +XC5VLX330 0x2295C093 0x0FFFFFFF 10 +XC2S200E 0x20A1C093 0x0FFFFFFF 5 +XC2S300E 0x90A20093 0x0FFFFFFF 5 +XC3S200A 0x02218093 0x0FFFFFFF 6 +XC3S4000 0x01448093 0x0FFFFFFF 6 +XC6SLX45 0x04008093 0x0FFFFFFF 6 + +# ARM + +ARM7TDMI 0x3F0F0F0F 0xFFFFFFFF 4 +ARM7TDMI-r4 0x40700F0F 0xFFFFFFFF 4 +ARM720T 0x0F0F0F0F 0xFFFFFFFF 4 +ARM920T 0x10920F0F 0xFFFFFFFF 4 +ARM926EJ-S 0x07926F0F 0xFFFFFFFF 4 +ARM940T 0x1F0F0F0F 0xFFFFFFFF 4 +ARM10200 0x00A20F0F 0xFFFFFFFF 4 +ARMFLASH 0x0F0E5F2F 0xFFFFFFFF 5 +ARMDBT 0x00000F0F 0xFFFFFFFF 5 +PWP926EJ-S_BS2 0x0F21FF0F 0xFFFFFFFF 2 +ARM_BS2_ 0x0F203F0F 0xFFFFFFFF 2 +ARM1136J-Sr0_BS2 0x0F21DF0F 0xFFFFFFFF 2 +ARM11MPCore_BS5 0x17536021 0xFFFFFFFF 5 +PXP1176JZF_BS2 0x0F2258EF 0xFFFFFFFF 2 +CORTEXA8 0x0F423477 0xFFFFFFFF 4 +CORTEXA9 0x08226021 0xFFFFFFFF 4 + +# ALTERA + +EPM3032A 0x170320DD 0xFFFFFFFF 10 +EPM7256AE 0x172560DD 0xFFFFFFFF 10 +EPM7512AE 0x175120DD 0xFFFFFFFF 10 +EPM1270 0x020A30DD 0xFFFFFFFF 10 +EP20K1000E 0x090000DD 0xFFFFFFFF 10 +EP2S180F 0x020960DD 0xFFFFFFFF 10 + +# Misc + +ispClock5520 0x00150043 0xFFFFFFFF 8 +ispClock5620 0x00160043 0xFFFFFFFF 8 +ispClock5610V 0x00161043 0xFFFFFFFF 8 +ispClock5610AV 0x00166043 0xFFFFFFFF 8 +ISSP 0x0F0F0F0F 0x0FFFFFFF 5 +Mali200 0x10400477 0xFFFFFFFF 2 +PLX6520 0x3197839B 0xFFFFFFFF 5 +PLX8114 0x21FB239B 0xFFFFFFFF 5 +PLX8518 0x1214639B 0xFFFFFFFF 5 +PLX8518 0x4214639B 0xFFFFFFFF 5 + +STM32TMC 0x16410041 0x0FFF0FFF 5 +STM32CM3 0x3BA00477 0x0FFFFFFF 4 +IDT89HPES32H8 0x08035067 0xFFFFFFFF 6 +IDT89H16NT16 0x28090067 0xFFFFFFFF 6 +NX5000_BYPASS 0x14951185 0xFFFFFFFF 4 +NX5000_FC1152 0x03387589 0xFFFFFFFF 4 -- cgit v1.2.3