diff options
Diffstat (limited to 'SITE2')
29 files changed, 283 insertions, 0 deletions
diff --git a/SITE2/HBI0192B/AN224/a224cust.bit b/SITE2/HBI0192B/AN224/a224cust.bit Binary files differnew file mode 100755 index 0000000..e6e36f3 --- /dev/null +++ b/SITE2/HBI0192B/AN224/a224cust.bit diff --git a/SITE2/HBI0192B/AN224/a224cust.txt b/SITE2/HBI0192B/AN224/a224cust.txt new file mode 100755 index 0000000..8d99c07 --- /dev/null +++ b/SITE2/HBI0192B/AN224/a224cust.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN224
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a224cust.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 90.0 ;OSC0 Frequency in MHz (ACLK)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 33.0 ;OSC3 Frequency in MHz (ExtS ACLK)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192B/AN224/a224r0p1.bit b/SITE2/HBI0192B/AN224/a224r0p1.bit Binary files differnew file mode 100755 index 0000000..e6e36f3 --- /dev/null +++ b/SITE2/HBI0192B/AN224/a224r0p1.bit diff --git a/SITE2/HBI0192B/AN224/a224r0p1.txt b/SITE2/HBI0192B/AN224/a224r0p1.txt new file mode 100755 index 0000000..ba6c380 --- /dev/null +++ b/SITE2/HBI0192B/AN224/a224r0p1.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN224
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a224r0p1.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 90.0 ;OSC0 Frequency in MHz (ACLK)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 33.0 ;OSC3 Frequency in MHz (ExtS ACLK)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192B/AN243/a243cust.bit b/SITE2/HBI0192B/AN243/a243cust.bit Binary files differnew file mode 100755 index 0000000..8264231 --- /dev/null +++ b/SITE2/HBI0192B/AN243/a243cust.bit diff --git a/SITE2/HBI0192B/AN243/a243cust.txt b/SITE2/HBI0192B/AN243/a243cust.txt new file mode 100755 index 0000000..f055239 --- /dev/null +++ b/SITE2/HBI0192B/AN243/a243cust.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN243
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a243cust.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 80.0 ;OSC0 Frequency in MHz (2:1 ACLK/HSBS)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 50.0 ;OSC3 Frequency in MHz (Not used)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192B/AN243/a243r0p0.bit b/SITE2/HBI0192B/AN243/a243r0p0.bit Binary files differnew file mode 100755 index 0000000..8264231 --- /dev/null +++ b/SITE2/HBI0192B/AN243/a243r0p0.bit diff --git a/SITE2/HBI0192B/AN243/a243r0p0.txt b/SITE2/HBI0192B/AN243/a243r0p0.txt new file mode 100755 index 0000000..ce94be5 --- /dev/null +++ b/SITE2/HBI0192B/AN243/a243r0p0.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN243
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a243r0p0.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 80.0 ;OSC0 Frequency in MHz (2:1 ACLK/HSBS)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 50.0 ;OSC3 Frequency in MHz (Not used)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192B/board.txt b/SITE2/HBI0192B/board.txt new file mode 100755 index 0000000..18ec327 --- /dev/null +++ b/SITE2/HBI0192B/board.txt @@ -0,0 +1,14 @@ +BOARD: HBI0192
+TITLE: FPGA V2F-1XV5
+
+[APPLICATION NOTE]
+APPNOTE: ANxxx\axxxrxpx.txt ;Please select the required application note
+;APPNOTE: AN224\a224r0p1.txt
+;APPNOTE: AN243\a243r0p0.txt
+
+[DCCS]
+TOTALDCCS: 1 ;Total Number of DCCS (Max:8)
+M0FILE: dbb_v135.ebf ;DCC0 Filename
+M0MODE: MICRO ;DCC0 Programming Mode
+
+
diff --git a/SITE2/HBI0192B/dbb_v135.ebf b/SITE2/HBI0192B/dbb_v135.ebf Binary files differnew file mode 100755 index 0000000..2b8c926 --- /dev/null +++ b/SITE2/HBI0192B/dbb_v135.ebf diff --git a/SITE2/HBI0192C/AN224/a224cust.bit b/SITE2/HBI0192C/AN224/a224cust.bit Binary files differnew file mode 100755 index 0000000..85c0b93 --- /dev/null +++ b/SITE2/HBI0192C/AN224/a224cust.bit diff --git a/SITE2/HBI0192C/AN224/a224cust.txt b/SITE2/HBI0192C/AN224/a224cust.txt new file mode 100755 index 0000000..8d99c07 --- /dev/null +++ b/SITE2/HBI0192C/AN224/a224cust.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN224
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a224cust.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 90.0 ;OSC0 Frequency in MHz (ACLK)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 33.0 ;OSC3 Frequency in MHz (ExtS ACLK)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192C/AN224/a224r0p1.bit b/SITE2/HBI0192C/AN224/a224r0p1.bit Binary files differnew file mode 100755 index 0000000..85c0b93 --- /dev/null +++ b/SITE2/HBI0192C/AN224/a224r0p1.bit diff --git a/SITE2/HBI0192C/AN224/a224r0p1.txt b/SITE2/HBI0192C/AN224/a224r0p1.txt new file mode 100755 index 0000000..ba6c380 --- /dev/null +++ b/SITE2/HBI0192C/AN224/a224r0p1.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN224
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a224r0p1.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 90.0 ;OSC0 Frequency in MHz (ACLK)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 33.0 ;OSC3 Frequency in MHz (ExtS ACLK)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192C/AN243/a243cust.bit b/SITE2/HBI0192C/AN243/a243cust.bit Binary files differnew file mode 100755 index 0000000..8264231 --- /dev/null +++ b/SITE2/HBI0192C/AN243/a243cust.bit diff --git a/SITE2/HBI0192C/AN243/a243cust.txt b/SITE2/HBI0192C/AN243/a243cust.txt new file mode 100755 index 0000000..f055239 --- /dev/null +++ b/SITE2/HBI0192C/AN243/a243cust.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN243
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a243cust.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 80.0 ;OSC0 Frequency in MHz (2:1 ACLK/HSBS)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 50.0 ;OSC3 Frequency in MHz (Not used)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192C/AN243/a243r0p0.bit b/SITE2/HBI0192C/AN243/a243r0p0.bit Binary files differnew file mode 100755 index 0000000..8264231 --- /dev/null +++ b/SITE2/HBI0192C/AN243/a243r0p0.bit diff --git a/SITE2/HBI0192C/AN243/a243r0p0.txt b/SITE2/HBI0192C/AN243/a243r0p0.txt new file mode 100755 index 0000000..ce94be5 --- /dev/null +++ b/SITE2/HBI0192C/AN243/a243r0p0.txt @@ -0,0 +1,21 @@ +BOARD: HBI0192
+TITLE: AN243
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: a243r0p0.bit ;FPGA0 Filename
+F0MODE: FPGA ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 80.0 ;OSC0 Frequency in MHz (2:1 ACLK/HSBS)
+OSC1: 23.75 ;OSC1 Frequency in MHz (CLCD)
+OSC2: 100.0 ;OSC2 Frequency in MHz (ZBTRAM)
+OSC3: 50.0 ;OSC3 Frequency in MHz (Not used)
+OSC4: 50.0 ;OSC4 Frequency in MHz (SMB)
+OSC5: 50.0 ;OSC5 Frequency in MHz (Not used)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0192C/board.txt b/SITE2/HBI0192C/board.txt new file mode 100755 index 0000000..18ec327 --- /dev/null +++ b/SITE2/HBI0192C/board.txt @@ -0,0 +1,14 @@ +BOARD: HBI0192
+TITLE: FPGA V2F-1XV5
+
+[APPLICATION NOTE]
+APPNOTE: ANxxx\axxxrxpx.txt ;Please select the required application note
+;APPNOTE: AN224\a224r0p1.txt
+;APPNOTE: AN243\a243r0p0.txt
+
+[DCCS]
+TOTALDCCS: 1 ;Total Number of DCCS (Max:8)
+M0FILE: dbb_v135.ebf ;DCC0 Filename
+M0MODE: MICRO ;DCC0 Programming Mode
+
+
diff --git a/SITE2/HBI0192C/dbb_v135.ebf b/SITE2/HBI0192C/dbb_v135.ebf Binary files differnew file mode 100755 index 0000000..2b8c926 --- /dev/null +++ b/SITE2/HBI0192C/dbb_v135.ebf diff --git a/SITE2/HBI0217B/AN233/f550r0p1.bit b/SITE2/HBI0217B/AN233/f550r0p1.bit Binary files differnew file mode 100755 index 0000000..c6a6838 --- /dev/null +++ b/SITE2/HBI0217B/AN233/f550r0p1.bit diff --git a/SITE2/HBI0217B/AN233/f550r0p1.txt b/SITE2/HBI0217B/AN233/f550r0p1.txt new file mode 100755 index 0000000..a2de055 --- /dev/null +++ b/SITE2/HBI0217B/AN233/f550r0p1.txt @@ -0,0 +1,22 @@ +BOARD: HBI0217
+TITLE: AN233
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: f550r0p1.bit ;FPGA0 Filename
+F0MODE: FPGA_PCM ;FPGA0 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 6 ;Total Number of OSCCLKS (Max:8)
+OSC0: 80 ;OSC1 Frequency in MHz (550T ACLK)
+OSC1: 125 ;OSC2 Frequency in MHz (550T MCLK REF)
+OSC2: 23.75 ;OSC3 Frequency in MHz (550T CLCD)
+OSC3: 35 ;OSC4 Frequency in MHz (760 ACLK_LINK & ACLK(ACLK_LINKx2))
+OSC4: 33 ;OSC5 Frequency in MHz (760 AXICLK_EMS)
+OSC5: 24 ;OSC6 Not used
+
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0217B/AN233/f760r0p1.bit b/SITE2/HBI0217B/AN233/f760r0p1.bit Binary files differnew file mode 100755 index 0000000..3fbe259 --- /dev/null +++ b/SITE2/HBI0217B/AN233/f760r0p1.bit diff --git a/SITE2/HBI0217B/AN233/f760r0p1.txt b/SITE2/HBI0217B/AN233/f760r0p1.txt new file mode 100755 index 0000000..4f0d6be --- /dev/null +++ b/SITE2/HBI0217B/AN233/f760r0p1.txt @@ -0,0 +1,16 @@ +BOARD: HBI0217
+TITLE: AN233
+
+[FPGAS]
+TOTALFPGAS: 1 ;Total Number of FPGAS (Max:8)
+F0FILE: f760r0p1.bit ;FPGA0 Filename
+F0MODE: FPGA_PCM ;FPGA0 Programming Mode
+
+[VOLTAGES]
+TOTALVOLTAGES: 1 ;Total Number of VOLTAGES to set (Max:4)
+VOLT0: 1.8 ;VIO_UP maximum voltage (0.8 to 2.5)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers defined
+SCC: 0x000 0x01234567 ;SCC gereral read/write regsiter address/value
+SCC: 0x004 0x89ABCDEF ;SCC gereral read/write register address/value
diff --git a/SITE2/HBI0217B/board.txt b/SITE2/HBI0217B/board.txt new file mode 100755 index 0000000..332f2e7 --- /dev/null +++ b/SITE2/HBI0217B/board.txt @@ -0,0 +1,14 @@ +BOARD: HBI0217
+TITLE: V2F 2XV6 FPGA
+
+[APPLICATION NOTE]
+TOTALAPP: 2 ;Total Number of Application notes (Max:8)
+A0FILE: AN233\f550r0p1.txt ;Application note board file for XC6VLX550T
+A1FILE: AN233\f760r0p1.txt ;Application note board file for XC6VLX760
+
+[DCC]
+TOTALDCC: 2 ;Total Number of DCC (Max:8)
+M0FILE: dbb_v112.ebf ;Filename for XC6VLX240T DCC
+M0MODE: MICRO ;Programming Mode
+M1FILE: dbb_v213.ebf ;Filename for XC6VLX760 DCC
+M1MODE: MICRO ;Programming Mode
diff --git a/SITE2/HBI0217B/board_1.txt b/SITE2/HBI0217B/board_1.txt new file mode 100755 index 0000000..5dc2aaa --- /dev/null +++ b/SITE2/HBI0217B/board_1.txt @@ -0,0 +1,14 @@ +BOARD: HBI0217 stack 1
+TITLE: V2F 2XV6 FPGA
+
+[APPLICATION NOTE]
+TOTALAPP: 2 ;Total Number of Application notes (Max:8)
+A0FILE: AN233\f550r0p1.txt ;Application note board file for XC6VLX550T
+A1FILE: AN233\f760r0p1.txt ;Application note board file for XC6VLX760
+
+[DCC]
+TOTALDCC: 2 ;Total Number of DCC (Max:8)
+M0FILE: dbb_v112.ebf ;Filename for XC6VLX240T DCC
+M0MODE: MICRO ;Programming Mode
+M1FILE: dbb_v213.ebf ;Filename for XC6VLX760 DCC
+M1MODE: MICRO ;Programming Mode
diff --git a/SITE2/HBI0217B/dbb_v112.ebf b/SITE2/HBI0217B/dbb_v112.ebf Binary files differnew file mode 100755 index 0000000..2dbe31a --- /dev/null +++ b/SITE2/HBI0217B/dbb_v112.ebf diff --git a/SITE2/HBI0217B/dbb_v213.ebf b/SITE2/HBI0217B/dbb_v213.ebf Binary files differnew file mode 100755 index 0000000..77862b6 --- /dev/null +++ b/SITE2/HBI0217B/dbb_v213.ebf diff --git a/SITE2/HBI0232A/board.txt b/SITE2/HBI0232A/board.txt new file mode 100755 index 0000000..a9a0267 --- /dev/null +++ b/SITE2/HBI0232A/board.txt @@ -0,0 +1,21 @@ +BOARD: HBI0232
+TITLE: V2C-002 PCIe breakout board
+
+[DCCS]
+TOTALDCCS: 0 ;(1) Total Number of DCCS - Do not change this value
+M0FILE: NONE ;DCC0 Filename
+M0MODE: NONE ;DCC0 Programming Mode
+
+[FPGAS]
+TOTALFPGAS: 0 ;(0) - Do not change this value
+F0FILE: NONE ;FPGA0 Filename
+F0MODE: NONE ;FPGA0 Programming Mode
+
+[TAPS]
+TOTALTAPS: 0 ;(6) - Do not change this value
+
+[OSCCLKS]
+TOTALOSCCLKS: 0 ;Total Number of OSCCLKS (3) - Do not change this value
+
+[SCC REGISTERS]
+TOTALSCCS: 0 ;Total Number of SCC registers defined
|