diff options
Diffstat (limited to 'SITE1/HBI0249A/board.txt')
| -rw-r--r-- | SITE1/HBI0249A/board.txt | 40 |
1 files changed, 19 insertions, 21 deletions
diff --git a/SITE1/HBI0249A/board.txt b/SITE1/HBI0249A/board.txt index 2d3cf8f..67e73ba 100644 --- a/SITE1/HBI0249A/board.txt +++ b/SITE1/HBI0249A/board.txt @@ -35,27 +35,27 @@ OSC8: 50.0 ;DDR2 (8:1 - 400MHz) [SCC REGISTERS]
TOTALSCCS: 32 ;Total Number of SCC registers
-
SCC: 0x01C 0xFF00FF00 ;CFGRW3 - SMC CS6/7 N/U
SCC: 0x118 0x01CD1011 ;CFGRW17 - HDLCD PLL external bypass
-SCC: 0x700 0x1032F003 ;CFGRW48 - [25:24]Boot CPU [28]Boot Cluster (default CA7_0)
- ; Bootmon configuration:
- ; [15]: A7 Event stream generation (default: disabled)
- ; [14]: A15 Event stream generation (default: disabled)
- ; [13]: Power down the non-boot cluster (default: disabled)
- ; [12]: Use per-cpu mailboxes for power management (default: disabled)
- ; [11]: A15 executes WFEs as nops (default: disabled)
- ; [ 4]: Erase UEFI variable storage in NOR flash
-SCC: 0x400 0x33330c00 ;CFGREG41 - A15 configuration register 0 (Default 0x33330c80)
- ; [29:28] SPNIDEN
- ; [25:24] SPIDEN
- ; [21:20] NIDEN
- ; [17:16] DBGEN
- ; [13:12] CFGTE
- ; [9:8] VINITHI_CORE
- ; [7] IMINLN
- ; [3:0] CLUSTER_ID
+SCC: 0x700 0x1032F003 ;CFGRW48 - Cluster configuration register (Default 0x0032F003)
+ ; [ 28] Boot Cluster (default CA15)
+ ; [25:24] Boot CPU (default 0)
+ ; [ 15] A7 Event stream generation (default: enabled)
+ ; [ 14] A15 Event stream generation (default: enabled)
+ ; [ 13] Power down the non-boot cluster (default: enabled)
+ ; [ 12] Use per-cpu mailboxes for power management (default: enabled)
+ ; [ 11] A15 executes WFEs as nops (default: disabled)
+
+SCC: 0x400 0x33330C00 ;CFGRW41 - A15 configuration register 0 (Default 0x33330C00)
+ ; [29:28] SPNIDEN
+ ; [25:24] SPIDEN
+ ; [21:20] NIDEN
+ ; [17:16] DBGEN
+ ; [13:12] CFGTE
+ ; [ 9: 8] VINITHI_CORE
+ ; [ 7] IMINLN
+ ; [ 3: 0] CLUSTER_ID
;Set the CPU clock PLLs
SCC: 0x120 0x022F1010 ;CFGRW19 - CA15_0 PLL control - 20:1 (lock OFF)
@@ -68,9 +68,7 @@ SCC: 0x138 0x022F1010 ;CFGRW25 - CA7_1 PLL control - 20:1 (lock OFF) SCC: 0x13C 0x0011710D ;CFGRW26 - CA7_1 PLL value
;Power management interface
-;SCC: 0xC00 0x00000001 ;Control: [0]PMI_EN [1]DBG_EN [2]SPC_SYSCFG
-SCC: 0xC00 0x00000005 ;Control: [0]PMI_EN [1]DBG_EN [2]SPC_SYSCFG
-;SCC: 0xC04 0x000005DC ;Latency in uS max: [15:0]DVFS [31:16]PWRUP
+SCC: 0xC00 0x00000005 ;Control: [0]PMI_EN [1]DBG_EN [2]SPC_SYSCFG (disable DBG_EN for power measurements)
SCC: 0xC04 0x060E0356 ;Latency in uS max: [15:0]DVFS [31:16]PWRUP
SCC: 0xC08 0x00000000 ;Reserved
SCC: 0xC0C 0x00000000 ;Reserved
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