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Diffstat (limited to 'SITE1/HBI0237A/board.txt')
| -rw-r--r-- | SITE1/HBI0237A/board.txt | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/SITE1/HBI0237A/board.txt b/SITE1/HBI0237A/board.txt new file mode 100644 index 0000000..a805b6f --- /dev/null +++ b/SITE1/HBI0237A/board.txt @@ -0,0 +1,39 @@ +BOARD: HBI0237
+TITLE: V2P-CA15 Configuration File
+
+[DCCS]
+TOTALDCCS: 1 ;Total Number of DCCS
+M0FILE: dbb_v102.ebf ;DCC0 Filename
+M0MODE: MICRO ;DCC0 Programming Mode
+
+[FPGAS]
+TOTALFPGAS: 0 ;Total Number of FPGAs
+
+[TAPS]
+TOTALTAPS: 3 ;Total Number of TAPs
+T0NAME: STM32TMC ;TAP0 Device Name
+T0FILE: NONE ;TAP0 Filename
+T0MODE: NONE ;TAP0 Programming Mode
+T1NAME: STM32CM3 ;TAP1 Device Name
+T1FILE: NONE ;TAP1 Filename
+T1MODE: NONE ;TAP1 Programming Mode
+T2NAME: CORTEXA15 ;TAP2 Device Name
+T2FILE: NONE ;TAP2 Filename
+T2MODE: NONE ;TAP2 Programming Mode
+
+[OSCCLKS]
+TOTALOSCCLKS: 9 ;Total Number of OSCCLKS
+OSC0: 60.0 ;CPUREFCLK0 A15 CPU (20:1 - 1.2GHz)
+OSC1: 24.0 ;N/U
+OSC2: 24.0 ;N/U
+OSC3: 24.0 ;N/U
+OSC4: 40.0 ;HSBM AXI (40MHz)
+OSC5: 63.5 ;HDLCD (63.5MHz - TC PLL is in bypass)
+OSC6: 50.0 ;SMB (50MHz)
+OSC7: 60.0 ;SYSREFCLK (20:1 - 1.2GHz, ACLK - 600MHz)
+OSC8: 40.0 ;DDR2 (8:1 - 320MHz)
+
+[SCC REGISTERS]
+TOTALSCCS: 2 ;Total Number of SCC registers
+SCC: 0x01C 0xFF00FF00 ;CFGRW5 - SMC CS6/7 N/U
+SCC: 0x1B0 0x01CD1011 ;CFGRW14 - HDLCD PLL external bypass
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