summaryrefslogtreecommitdiff
path: root/SITE1/HBI0262B/board.txt
diff options
context:
space:
mode:
authorRyan Harkin <ryan.harkin@linaro.org>2014-06-20 15:16:16 +0100
committerRyan Harkin <ryan.harkin@linaro.org>2014-06-20 15:19:59 +0100
commit09afab33b5ebca4502b3b95deb402d74213e0e1f (patch)
treebe29ba637ed9d37ca0b2c410ff39b588138421fb /SITE1/HBI0262B/board.txt
parente728202430ee6f1f933d4e269d3490d9ccc9142f (diff)
downloadvexpress-firmware-09afab33b5ebca4502b3b95deb402d74213e0e1f.tar.gz
add board_recovery_image_0.7.5.zip
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Diffstat (limited to 'SITE1/HBI0262B/board.txt')
-rw-r--r--SITE1/HBI0262B/board.txt17
1 files changed, 17 insertions, 0 deletions
diff --git a/SITE1/HBI0262B/board.txt b/SITE1/HBI0262B/board.txt
new file mode 100644
index 0000000..0269b4c
--- /dev/null
+++ b/SITE1/HBI0262B/board.txt
@@ -0,0 +1,17 @@
+BOARD: HBI0262
+TITLE: V2M-Juno DevChip Configuration File
+
+[SCC REGISTERS]
+TOTALSCCS: 7 ;Total Number of SCC registers
+SCC: 0x100 0x801F1000 ;A57 PLL Register 0 (800MHz)
+SCC: 0x104 0x0000F100 ;A57 PLL Register 1
+SCC: 0x108 0x801B1000 ;A53 PLL Register 0 (700MHz)
+SCC: 0x10C 0x0000D100 ;A53 PLL Register 1
+SCC: 0x0F8 0x0BEC0000 ;BL1 entry point
+
+SCC: 0x00C 0x000000C2 ;Clock Control, TMIF2XCLK, Register 0xC1 = default
+ ;[3:0] CLKSEL : 0 Output gated, 1 AON_REF_CLK, 2 SYSCLK
+ ;[7:4] CLKDIV : Clock divider -1 (0 give a division of 1)
+SCC: 0x010 0x000000C2 ;Clock Control, TSIF2XCLK, Register 0xC1 = default
+ ;[3:0] CLKSEL : 0 Output gated, 1 AON_REF_CLK, 2 SYSCLK
+ ;[7:4] CLKDIV : Clock divider -1 (0 give a division of 1)