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authorRyan Harkin <ryan.harkin@linaro.org>2015-05-11 16:55:40 +0100
committerRyan Harkin <ryan.harkin@linaro.org>2015-05-11 16:55:40 +0100
commit4b23b99bbd41c69a11b0f5eca210694ab17c99fc (patch)
treef9ccd920d96f624b03357faf50579b9d5ebdf0a6 /MB/HBI0262B/board.txt
parentfe8058e2f462dc0a5cc98995d39428af50a69ce2 (diff)
downloadvexpress-firmware-4b23b99bbd41c69a11b0f5eca210694ab17c99fc.tar.gz
add board_recovery_image_0.11.3.zipjuno-0.11.3
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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+BOARD: HBI0262
+TITLE: MotherBoard Configuration File
+
+[MCCS]
+MBBIOS: mbb_v133.ebf ;MB BIOS IMAGE
+
+[FPGAS]
+MBIOFPGA: io_b117.bit ;MB IOFPGA
+
+[PMIC]
+MBPMIC: pms_v103.bin ;MB PMIC
+
+[OSCCLKS]
+TOTALOSCCLKS: 11
+OSC0: 50.0 ;OSC0 Juno SYSREFCLK (System clock)
+OSC1: 50.0 ;OSC1 Juno AONREFCLK (Always On)
+OSC2: 50.0 ;OSC2 Juno PXLREFCLK (HS pixel clock)
+OSC3: 47.5 ;OSC3 Juno PXCLKIN (LS pixel clock)
+OSC4: 2.11 ;OSC4 Juno I2SCLK (Audio)
+OSC5: 50.0 ;OSC5 Juno SMCMCLK (Static memory)
+OSC6: 50.0 ;OSC6 Juno CA53 REF_CLK (RSVD)
+OSC7: 50.0 ;OSC7 Juno CA57 REF_CLK (RSVD)
+OSC8: 50.0 ;OSC8 Juno GPU REF_CLK (RSVD)
+OSC9: 30.0 ;OSC9 IOFPGA BOOT (RSVD)
+OSC10: 24.0 ;OSC10 IOFPGA UART (RSVD)
+OSC11: 7.37 ;OSC11 Juno UARTCLK (UART clock)