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authorRyan Harkin <ryan.harkin@linaro.org>2013-12-11 17:17:09 +0000
committerRyan Harkin <ryan.harkin@linaro.org>2013-12-11 17:17:09 +0000
commit0a178ae63a5d9adb2bfe0aea22e8e7680e59095b (patch)
treee46ab54b7eb7edf436f07893585d7aac7432172c
parent7551bb49ddacd733e0b4fa978e0b3ff9d88830ef (diff)
Add license files for distribution
The agreement between ARM and Linaro states that the EULA should be kept with any redistribution of the Versatile Express Firmware. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
-rw-r--r--licence.pdfbin0 -> 37843 bytes
-rw-r--r--license.rtf348
2 files changed, 348 insertions, 0 deletions
diff --git a/licence.pdf b/licence.pdf
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diff --git a/license.rtf b/license.rtf
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+\clbrdrb\brdrtbl \clbrdrr\brdrtbl \cltxlrtb\clftsWidth3\clwWidth3227\clshdrawnil \cellx3119\clvertalt\clbrdrt\brdrtbl \clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr\brdrtbl \cltxlrtb\clftsWidth3\clwWidth3213\clshdrawnil \cellx6332\clvertalt\clbrdrt\brdrtbl
+\clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr\brdrtbl \cltxlrtb\clftsWidth3\clwWidth3321\clshdrawnil \cellx9653\row }\trowd \irow1\irowband1\lastrow
+\ts11\trgaph108\trrh240\trleft-108\trftsWidth3\trwWidth9761\trftsWidthB3\trftsWidthA3\trautofit1\trpaddl108\trpaddr108\trpaddfl3\trpaddfr3 \clvertalt\clbrdrt\brdrtbl \clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr\brdrtbl
+\cltxlrtb\clftsWidth3\clwWidth9761\clshdrawnil \cellx9653\pard \qr \li0\ri-108\widctlpar\intbl\aspalpha\aspnum\faauto\adjustright\rin-108\lin0\pararsid12738677 {\fs18\loch\af1\hich\af1\dbch\af1\insrsid3757761 \cell }\pard
+\ql \li0\ri0\widctlpar\intbl\aspalpha\aspnum\faauto\adjustright\rin0\lin0 {\fs18\loch\af1\hich\af1\dbch\af1\insrsid3757761 \trowd \irow1\irowband1\lastrow
+\ts11\trgaph108\trrh240\trleft-108\trftsWidth3\trwWidth9761\trftsWidthB3\trftsWidthA3\trautofit1\trpaddl108\trpaddr108\trpaddfl3\trpaddfr3 \clvertalt\clbrdrt\brdrtbl \clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr\brdrtbl
+\cltxlrtb\clftsWidth3\clwWidth9761\clshdrawnil \cellx9653\row }\pard \ql \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0 {\insrsid3757761
+\par }}{\footer \trowd \irow0\irowband0\lastrow \ts11\trgaph108\trrh240\trleft-108\trftsWidth3\trwWidth10030\trftsWidthB3\trftsWidthA3\trautofit1\trpaddl108\trpaddr108\trpaddfl3\trpaddfr3 \clvertalt\clbrdrt\brdrtbl \clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr
+\brdrtbl \cltxlrtb\clftsWidth3\clwWidth5211\clshdrawnil \cellx5103\clvertalt\clbrdrt\brdrtbl \clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr\brdrtbl \cltxlrtb\clftsWidth3\clwWidth4819\clshdrawnil \cellx9922\pard\plain
+\qr \li0\ri0\widctlpar\intbl\aspalpha\aspnum\faauto\adjustright\rin0\lin0 \fs20\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\fs18\loch\af1\hich\af1\dbch\af1\insrsid3757761 \cell \cell }\pard
+\ql \li0\ri0\widctlpar\intbl\aspalpha\aspnum\faauto\adjustright\rin0\lin0 {\fs18\loch\af1\hich\af1\dbch\af1\insrsid3757761 \trowd \irow0\irowband0\lastrow
+\ts11\trgaph108\trrh240\trleft-108\trftsWidth3\trwWidth10030\trftsWidthB3\trftsWidthA3\trautofit1\trpaddl108\trpaddr108\trpaddfl3\trpaddfr3 \clvertalt\clbrdrt\brdrtbl \clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr\brdrtbl
+\cltxlrtb\clftsWidth3\clwWidth5211\clshdrawnil \cellx5103\clvertalt\clbrdrt\brdrtbl \clbrdrl\brdrtbl \clbrdrb\brdrtbl \clbrdrr\brdrtbl \cltxlrtb\clftsWidth3\clwWidth4819\clshdrawnil \cellx9922\row }\pard
+\ql \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0 {\insrsid3757761
+\par }}{\*\pnseclvl1\pnucrm\pnstart1\pnindent720\pnhang {\pntxta .}}{\*\pnseclvl2\pnucltr\pnstart1\pnindent720\pnhang {\pntxta .}}{\*\pnseclvl3\pndec\pnstart1\pnindent720\pnhang {\pntxta .}}{\*\pnseclvl4\pnlcltr\pnstart1\pnindent720\pnhang {\pntxta )}}
+{\*\pnseclvl5\pndec\pnstart1\pnindent720\pnhang {\pntxtb (}{\pntxta )}}{\*\pnseclvl6\pnlcltr\pnstart1\pnindent720\pnhang {\pntxtb (}{\pntxta )}}{\*\pnseclvl7\pnlcrm\pnstart1\pnindent720\pnhang {\pntxtb (}{\pntxta )}}{\*\pnseclvl8
+\pnlcltr\pnstart1\pnindent720\pnhang {\pntxtb (}{\pntxta )}}{\*\pnseclvl9\pnlcrm\pnstart1\pnindent720\pnhang {\pntxtb (}{\pntxta )}}\pard\plain \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280
+\fs20\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\f1\fs18\insrsid9978280\charrsid15491475 END USER LICENCE AGREEMENT FOR THE DELIVERABLES ASSOCIATED WITH THE ARM SUPPORTING DVD FOR ARM\rquote S VERSATILE EXPRESS FAMILY OF DEVELOPMENT BOARDS.
+
+\par
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 THIS END USER LICENCE AGREEMENT (\'93LICENCE\'94) IS A LEGAL AGREEMENT BETWEEN YOU (EITHER A SINGLE INDIVIDUAL, OR
+SINGLE LEGAL ENTITY) AND ARM LIMITED ("ARM") FOR THE USE OF THE DELIVERABLES ACCOMPANYING THIS LICENCE. ARM IS ONLY WILLING TO LICENSE THE DELIVERABLES TO YOU ON CONDITION THAT YOU ACCEPT ALL OF THE TERMS IN THIS LICENCE. BY CLICKING \'93I AGREE\'94
+ OR BY INSTAL
+LING OR OTHERWISE USING OR COPYING THE DELIVERABLES YOU INDICATE THAT YOU AGREE TO BE BOUND BY ALL THE TERMS OF THIS LICENCE. IF YOU DO NOT AGREE TO THE TERMS OF THIS LICENCE, ARM IS UNWILLING TO LICENSE THE DELIVERABLES TO YOU AND YOU MAY NOT INSTALL, US
+E OR COPY THE DELIVERABLES, BUT YOU SHOULD PROMPTLY RETURN THE DELIVERABLES TO YOUR SUPPLIER AND ASK FOR A REFUND OF ANY LICENCE FEE PAID.
+\par
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 \'93ARM Versatile Express Development Board\'94 means a hardware development board purchased directly from ARM or its authorised distributors.}{
+\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+\par
+\par }\pard\plain \s15\qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 \fs24\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+"Deliverables" means any software, firmware, boardfiles, data and documentation accompanying this Licence, any printed, electronic or online documentation supplied with it, and any updates, patches and modifications ARM}{
+\f1\fs18\insrsid9978280\charrsid15491475 }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 may make availa
+ble to you under the terms of this Licence, in all cases relating to the supporting deliverables for the ARM Versatile Express Development Board. }{\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard\plain \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 \fs20\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 \'93Separate Files\'94 means the separate files identified in Part D of the Schedule. }{\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard\plain \s15\qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 \fs24\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard\plain \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 \fs20\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\f1\fs18\insrsid9978280\charrsid15491475 1. LICENCE GRANTS.
+\par }\pard \qj \fi-284\li284\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin284\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 (i) D
+ELIVERABLES: ARM hereby grants to you, subject to the terms and conditions of this Licence, a non-exclusive, non-transferable licence solely for use on an ARM Versatile Express Development Board and only for the purposes of your internal development, test
+ing and debugging of software applications that are designed to run solely on microprocessors manufactured under licence from ARM, to:
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \fi-435\li719\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin719\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 (a)\tab use and copy the Deliverables identified in Part A of the Schedule;
+\par
+\par (b)\tab use, copy and modify the Deliverables identified in Part B and Part C of the Schedule;
+\par }\pard \qj \fi720\li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \fi-435\li719\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin719\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 (c)\tab
+distribute and sub-license to third parties the right to use, copy and modify the Deliverables identified in Part C(i) of the Schedule, or your derivatives thereof, as part of your own products (\'93Licensed Products\'94
+) provided you comply with the terms of Clause 1(ii);
+\par
+\par (d)\tab }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 permit either or both your customers and your authorised distributors to redistribute the }{\f1\fs18\insrsid9978280\charrsid15491475
+Deliverables identified in Part C(i) of the Schedule, or your derivatives thereof}{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 , solely as part
+ of Licensed Products developed by you or your pemitted users (identified in clause 2 paragraph three below)}{\f1\fs18\insrsid9978280\charrsid15491475 .
+\par
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+Except as permitted by clause 1(i)(b) above, you shall not modify the Deliverables. Except as permitted by clauses 1(i)(c) and 1(i)(d) above, you shall not redistribute any of the Deliverables.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 (ii) FURTHER CONDITIONS APPLICABLE TO REDISTRIBUTION AND SUB-LICENSING: If you choose to redistribute the Deliverables identified in Part C(i) of the Schedule (\'93Example Code\'94
+) you agree: (a) to ensure that they are licensed for use only as part of Licensed Products and only on microprocessors manufactured or simulated under licence from ARM; (b) not to use ARM\rquote
+s or any of its licensors names, logos or trademarks to market the Licensed Products;}{\f1\fs18\insrsid9978280\charrsid15491475 (c) to }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 inc
+lude valid copyright notices on the Licensed Products, and preserve any copyright notices which are included with, or in, the Example Code;}{\f1\fs18\insrsid9978280\charrsid15491475 (d) to }{
+\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 comply with all the other terms of this Licence; and}{\f1\fs18\insrsid9978280\charrsid15491475 (e) }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+to ensure that any further redistribution is limited
+ to redistribution by either or both your customers and your authorised distributors only as part of Licensed Products developed by you or your permitted users and only for use on microprocessors manufactured or simulated under licence from ARM and that
+your customers authorised distributors comply with the terms of this clause 1(ii). }{\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li720\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin720\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 2. RESTRICTIONS ON USE OF THE DELIVERABLES.
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 COPYING: You shall not use or copy the Deliverables except as expressly authorised in this Licence. You may make one additiona
+l copy of the delivered Deliverables media or image for backup or archival purposes.
+\par
+\par PERMITTED USERS: The Deliverables shall be used only by your employees, or by your bona fide sub-contractors for whose acts and omissions you hereby agree to be responsib
+le to ARM to the same extent as you are for any acts and omissions of your employees, and provided always that such sub-contractors; (i) work only onsite at your premises; (ii) comply with the terms of this Licence; (iii) are contractually obligated to us
+e
+ the Deliverables only for your benefit, and (iv) agree to assign all their work product and any rights they create therein in the supply of such work to you. Only the single individual, company or other legal entity to whom ARM is supplying this Licence
+m
+ay use the Deliverables. Except as provided in this clause, you shall not allow third parties (including but not limited to any subsidiary, parent or affiliated companies, or offsite contractors you may have) to use the Deliverables unless ARM specificall
+y agrees otherwise with you on a case by case basis.}{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid12738677\charrsid15491475
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+NO REMOTE USE: The Deliverables shall only be used onsite at your premises and only for your benefit.}{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid12738677\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+MULTIPLE VERSIONS: The media on which the Deliverables resides may contain more than one version of the Deliverables, each of which is compatible with a different operating system (such as Microsoft Windows XP Professional and Red Hat Linux).
+\par
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 ACADEMIC OR EDUCATIONAL USERS ONLY: If you or your employer or institution paid academic or educational pricin
+g for the Deliverables, or the Deliverables are identified as an academic or educational version (together \'93Academic Software\'94
+), then notwithstanding anything else in this Licence, YOU AGREE TO USE THE ACADEMIC SOFTWARE ONLY FOR ACADEMIC, NON-COMMERCIAL PU
+RPOSES, AND ARM DOES NOT GRANT YOU ANY RIGHTS TO DISTRIBUTE OR SUB-LICENSE ANY APPLICATIONS DEVELOPED USING THE ACADEMIC SOFTWARE UNDER THIS LICENCE.
+\par
+\par REVERSE ENGINEERING: Except to the extent that such activity is permitted by applicable law you shall no
+t reverse engineer, decompile or disassemble any of the Deliverables. If the Deliverables were provided to you in Europe you shall not reverse engineer, decompile or disassemble any of the Deliverables for the purposes of error correction.
+\par
+\par BENCHMARKING: T
+his licence does not prevent you from using the Deliverables for internal benchmarking purposes. However, you shall treat any and all benchmarking data, and any other results of your use or testing of the Deliverables which are indicative of performance,
+efficacy, reliability or quality, as confidential information and you shall not disclose such information to any third party without the express written permission of ARM.
+\par
+\par RESTRICTIONS ON TRANSFER OF LICENSED RIGHTS: The rights granted to you under this L
+icence may not be assigned, sublicensed or otherwise transferred by you to any third party without the prior written consent of ARM. An assignment shall be deemed to include, without limitation; }{\f1\fs18\insrsid9978280\charrsid15491475 (i)}{
+\f1\fs18\insrsid9978280\charrsid15491475 any transaction or series of transactions whereby a third
+ party acquires, directly or indirectly, the power to control the management and policies of you, whether through the acquisition of voting securities, by contract or otherwise; or }{\f1\fs18\insrsid9978280\charrsid15491475 (ii)}{
+\f1\fs18\insrsid9978280\charrsid15491475 the sale of more than fifty percent (50%) of the your assets whether in a single transaction or series of transactions. You shall not rent or lease the Deliverables. }{
+\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 You shall not share the Deliverables with contractors (except as identified in the \lquote PERMITTED USERS\rquote clause above) }{\f1\fs18\insrsid9978280\charrsid15491475
+or other third parties.
+\par
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 COPYRIGHT AND RESER
+VATION OF RIGHTS: The Deliverables are owned by ARM or its licensors and are protected by copyright and other intellectual property laws and international treaties. The Deliverables are licensed not sold. You acquire no rights to the Deliverables other th
+a
+n as expressly provided by this Licence. You shall not remove from the Deliverables any copyright notice or other notice and shall ensure that any such notice is reproduced in any copies of the whole or any part of the Deliverables made by you or your per
+mitted users.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par 3. SUPPORT AND MAINTENANCE.
+\par If you purchased the Deliverables directly from ARM, and you are not receiving them as an update or upgrade or as Academic Software (defined in Clause 2), you are entitled to reasonable support and maintenance for
+ the Deliverables for the period of one (1) year from the date of purchase. }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+The support will be provided on any version of the Deliverables which, at the date of your support request, are either; (a) the current version made generally available by ARM; or
+(b) the previous version made generally available by ARM at some time during the previous ninety (90) days.
+\par }\pard \qj \fi-720\li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+Support will be provided by telephone, email or other written format designated by ARM, prioritised at ARM\rquote s discretion, and may not be used as a substitute for training or as additional resource for your programming projects. }{
+\f1\fs18\insrsid9978280\charrsid15491475 }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+Maintenance will be provided in the form of upgrades, updates and patch releases to the Deliverables as and when they are made generally available from ARM.
+\par
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 ARM\rquote s obligati
+on under this Clause 3 is limited to the provision of support and maintenance to you and ARM is under no obligation to provide any support and maintenance to any third parties under this Licence. }{
+\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 If you purchase support and maintenance for additional years it will be provided pursuant to this Clause 3 and will be subject to the terms and conditions of this Licence.
+\par
+\par If; (i) you obtained the Deliverables from an ARM authorised reseller or other third party; (ii) Deliverables were provided free of charge or for evaluation; or (iii) it is }{\f1\fs18\insrsid9978280\charrsid15491475
+Academic Software, you are not entitled to any support for the Deliverables from ARM, but ARM may, at its sole discretion provide limited support to you. The vendor of the Deliverables may or may not offer support to you for the Deliverables. }{
+\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 Please refer to the Technical Support area of http://www.arm.com for contact details for ARM\rquote s support service and (if applicable) other authorised support channels. }{
+\f1\fs18\insrsid9978280\charrsid15491475 ARM shall be under no obligation to provide support in respect of any modifications (where permitted) to the Deliverables.
+\par }\pard \qj \fi-720\li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 4. CONFIDENTIALITY.
+\par You acknowledge that the Deliverables and any benchmarking data and related information mentioned in Clause 2 contains trade secrets and confidential material, and you agree to mainta
+in all such information in confidence and apply security measures no less stringent than the measures which you apply to protect your own like information, but not less than a reasonable degree of care, to prevent their unauthorised disclosure and use. Su
+bject to any restrictions imposed by applicable law, the period of confidentiality shall be indefinite. You agree that you shall not use any such information other than in normal use of the Deliverables under the licences granted in this Licence.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par Notwithstanding the foregoing you may disclose the Deliverables identified in Part C(i) of the Schedule to third parties solely in exercise of the licence rights contained in Clause 1(i)(c) of this Licence.
+\par
+\par 5. LIMITED WARRANTIES.
+\par For the period of ninety (90) day
+s from the date of receipt by you of the Deliverables, ARM warrants to you that (i) the media on which the Deliverables are provided shall be free from defects in materials and workmanship under normal use; and (ii) the Deliverables will perform substanti
+a
+lly in accordance with the accompanying documentation (if any). ARM's total liability and your exclusive remedy for breach of these limited warranties shall be limited to ARM, at ARM's option; (a) replacing the defective Deliverables; or (b) using reasona
+b
+le efforts to correct material, documented, reproducible defects in the Deliverables and delivering such corrected Deliverables to you. Any replacement Deliverables will be warranted for the remainder of the original warranty period or thirty (30) days, w
+hichever is the longer.
+\par
+\par EXCEPT AS PROVIDED ABOVE, YOU AGREE THAT THE DELIVERABLES ARE LICENSED \'93AS IS\'94, AND THAT ARM EXPRESSLY DISCLAIMS ALL REPRESENTATIONS, WARRANTIES, CONDITIONS OR OTHER TERMS, EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION
+ THE IMPLIED WARRANTIES OF NON- INFRINGEMENT, SATISFACTORY QUALITY, AND FITNESS FOR A PARTICULAR PURPOSE.
+\par
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 YOU EXPRESSLY ASSUME ALL LIABILITIES AND RISKS, FOR USE OR OPERATION OF SOFTWARE APPLICATIONS, INCLUDING WITHOUT LIMITATION, APPLICATIONS DESIGNED OR
+ INTENDED FOR MISSION CRITICAL APPLICATIONS, SUCH AS PACEMAKERS, WEAPONARY, AIRCRAFT NAVIGATION, FACTORY CONTROL SYSTEMS, ETC. SHOULD THE DELIVERABLES PROVE DEFECTIVE, YOU ASSUME THE ENTIRE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par 6. LIMITATION OF LIABILITY.
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL ARM BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES (INCLUDING LOSS OF PROFITS) ARISING OUT OF THE USE OR INABILITY TO USE THE DELIVERABLES WHE
+THER BASED ON A CLAIM UNDER CONTRACT, TORT OR OTHER LEGAL THEORY, EVEN IF ARM WAS ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+\par
+\par ARM does not seek to limit or exclude liability for death or personal injury arising from ARM's negligence or ARM\rquote s fraud and bec
+ause some jurisdictions do not permit the exclusion or limitation of liability for consequential or incidental damages the above limitation relating to liability for consequential damages may not apply to you.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 NOTWITHSTANDING ANYTHING TO THE CONTRARY CONT
+AINED IN THIS LICENCE, THE MAXIMUM LIABILITY OF ARM TO YOU IN AGGREGATE FOR ALL CLAIMS MADE AGAINST ARM IN CONTRACT TORT OR OTHERWISE UNDER OR IN CONNECTION WITH THE SUBJECT MATTER OF THIS LICENCE SHALL NOT EXCEED THE GREATER OF; (I) THE TOTAL OF SUMS PAI
+D BY YOU TO ARM (IF ANY) FOR THIS LICENCE; AND (II) $10,00 USD.
+\par }{\caps\f1\fs18\insrsid9978280\charrsid15491475 THE EXISTENCE OF MORE THAN ONE CLAIM WILL NOT ENLARGE OR EXTEND THE LIMIT.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par 7. THIRD PARTY RIGHTS.
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 The Separate Files are delivered subject to and your use is governed by their own separate li
+cence agreements. This Licence does not apply to such Separate Files and they are not included in the term \'93Deliverables\'94
+ under this Licence. You agree to comply with all terms and conditions imposed on you in respect of such Separate Files including those identified in the Schedule (\'93Third Party Terms\'94). }{\f1\fs18\highlight7\insrsid9978280\charrsid15491475
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+\par ARM HEREBY DISCLAIMS ANY AND ALL WARRANTIES EXPRESS OR IMPLIED FROM ANY THIRD PARTIES REGARDING ANY SEPARATE FILES, ANY THIRD PARTY MATERIALS INCLUDED IN THE DELIVERABLES, ANY THIRD PARTY MATERIALS FROM WHICH THE DELIVERABLES ARE DERIVED (COLLECTIVELY
+\'93OTHER CODE\'94), AND THE USE OF ANY OR ALL THE OTHER CODE IN CONNECTION WITH THE DELIVERABLES, INCLUDING (WITHOUT LIMITATION) ANY WARRANTIES OF SATISFACTORY QUALITY OR FITNESS FOR A PARTICULAR PURPOSE.
+\par
+\par NO TH
+IRD PARTY LICENSORS OF OTHER CODE SHALL HAVE ANY LIABILITY FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND WHETHER MADE UNDER CONTRACT, TORT OR OTHER LEGAL
+THEORY, ARISING IN ANY WAY OUT OF THE USE OR DISTRIBUTION OF THE OTHER CODE OR THE EXERCISE OF ANY RIGHTS GRANTED UNDER EITHER OR BOTH THIS LICENCE AND THE LEGAL TERMS APPLICABLE TO ANY SEPARATE FILES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+
+\par
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 The Lattice ispClock output files}{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 included in the Deliverables (\'93Lattice Files\'94) are derived from Lattice Semiconductor Corporation
+\rquote s ispVM system software. You agree to use the Lattice Files }{\f1\fs18\insrsid9978280\charrsid15491475 for the sole purpose of programming and reprogramming the Lattice
+ Semiconductor Corporation silicon devices fitted to the ARM Versatile Express Development Board and which are supported by the ispVM System software.
+\par
+\par }\pard\plain \s18\qj \li0\ri0\nowidctlpar\tx720\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 \fs24\lang1033\langfe1033\langnp1033\langfenp1033 {\f1\fs18\insrsid9978280\charrsid15491475 8. GOVERNMENT END USERS.
+\par }\pard\plain \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 \fs20\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+US Government Restrictions: Use, duplication, reproduction, release, modification, disclosure or transfer of the Deliverables is restricted in accordance with the terms of this Licence.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par 9. TERM AND TERMINATION.
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 This Licence shall remain in force until terminated by you or by ARM. Without prejudice to any of its other rights if y
+ou are in breach of any of the terms and conditions of this Licence then ARM may terminate this Licence immediately upon giving written notice to you. You may terminate this Licence at any time. Upon termination of this Licence by you or by ARM you shall
+s
+top using the Deliverables and confidential information and destroy all copies of the Deliverables and confidential information in your possession together with all documentation and related materials. Notwithstanding the foregoing, except where ARM has t
+erminated this Licence for your breach, your rights to distribute}{\f1\fs18\insrsid9978280\charrsid15491475 the Example Code }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+as part of Licensed Products developed prior to termination shall survive termination of this Licence, subject to the terms of this Licence. The provisions of Clauses 4, 6, 7, 8, 9 and 10 shall survive termination of this Licence.
+\par }{\f1\fs18\insrsid9978280\charrsid15491475
+\par 10. GENERAL.
+\par }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 This Licence is governed by English Law. Except where ARM agrees otherwise in; (i) a written contract signed by you and ARM; or (ii) a written contract provided by ARM and accepted by
+you, this is the only agreement between you and ARM relating to the Deliverables and it may only be modified by written agreement between you and ARM. This Licence may not be modified by purchase orders, advertising or other representation by any person.
+I
+f any clause or sentence in this Licence is held by a court of law to be illegal or unenforceable the remaining provisions of this Licence shall not be affected thereby. The failure by ARM to enforce any of the provisions of this Licence, unless waived in
+ writing, shall not constitute a waiver of ARM's rights to enforce such provision or any other provision of this Licence in the future.
+\par
+\par The Deliverables provided under this Licence are subject to U.S. export control laws, including the U.S. Export Administ
+ration Act and its associated regulations, and may be subject to export or import regulations in other countries. You agree to comply fully with all laws and regulations of the United States and other countries ("Export Laws") to assure that the Deliverab
+l
+es, are not (1) exported, directly or indirectly, in violation of Export Laws, either to any countries that are subject to U.S.A. export restrictions or to any end user who has been prohibited from participating in the U.S.A. export transactions by any fe
+deral agency of the U.S.A. government; or (2) intended to be used for any purpose prohibited by Export Laws, including, without limitation, nuclear, chemical, or biological weapons proliferation.
+\par
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 SCHEDULE
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard\plain \s5\qj \li0\ri0\keepn\widctlpar\aspalpha\aspnum\faauto\outlinelevel4\adjustright\rin0\lin0\itap0\pararsid9978280 \b\fs20\lang2057\langfe1033\kerning16\cgrid\langnp2057\langfenp1033 {\f1\fs18\kerning0\insrsid9978280\charrsid15491475 Part A
+
+\par }\pard\plain \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 \fs20\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\b\f1\fs18\insrsid9978280\charrsid15491475 Hardware Binaries:
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 FPGA and PLD configuration bitstream files for any or all of the Hardware Source identified below in this Part A
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\b\f1\fs18\insrsid9978280\charrsid15491475 Software Binaries:
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 Boot monitor binary
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 Keil USB and SD card drivers
+\par Lattice ispClock output files in binary
+\par SelfTest
+\par Motherboard configuration controller
+\par Daughterboard configuration controller
+\par
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\b\f1\fs18\insrsid9978280\charrsid15491475 Documentation:
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 Documentation, provided as PDF
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\highlight7\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\b\f1\fs18\insrsid9978280\charrsid15491475 Hardware Source}{\b\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+Hardware netlists of the ARM PrimeCell peripheral technology and components known as BP130, BP132, PL111, PL301, PL330 and PL354.
+\par }{\f1\fs18\highlight7\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\b\f1\fs18\insrsid9978280\charrsid15491475 Part B
+\par Wrapper:}{\f1\fs18\insrsid9978280\charrsid15491475
+\par Wrapper file provided as hardware source files and netlists
+\par
+\par }{\b\f1\fs18\insrsid9978280\charrsid15491475 Board Reference Designs:
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 Board reference design data for HPI-0232 (V2C-002) and HPI-212 (V2T-A7), including Gerber files}{\f1\fs18\insrsid9978280 , }{\f1\fs18\insrsid9978280\charrsid15491475 OrCad and PADS databases.
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\b\f1\fs18\lang1036\langfe1033\langnp1036\insrsid9978280\charrsid15491475 Part C: Example Code
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1036\langfe1033\highlight7\langnp1036\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\lang1036\langfe1033\langnp1036\insrsid9978280\charrsid15491475 (i)\tab Platform initialisation source code
+\par }\pard \qj \fi720\li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 Platform specific libraries and source code
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 (ii)\tab ARM source code portions of the boot monitor and SelfTest
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\b\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\b\f1\fs18\insrsid9978280\charrsid15491475 Part D: Separate Files}{\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475
+\par {\listtext\pard\plain\f1\fs18\lang2057\langfe1033\langfenp1033\insrsid9978280\charrsid15218450 \hich\af1\dbch\af0\loch\f1 A.\tab}}\pard \qj \fi-720\li720\ri0\widctlpar\aspalpha\aspnum\faauto\ls8\adjustright\rin0\lin720\itap0\pararsid9978280 {
+\f1\fs18\insrsid9978280\charrsid15218450 Linaro ALIP File system is provided under its own open and permissive licenses and its use is subject to the terms and conditions described in each licence.
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\outlinelevel0\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280
+\par {\listtext\pard\plain\f1\fs18\lang2057\langfe1033\langfenp1033\insrsid9978280 \hich\af1\dbch\af0\loch\f1 B.\tab}}\pard \qj \fi-720\li720\ri0\widctlpar\aspalpha\aspnum\faauto\ls8\outlinelevel0\adjustright\rin0\lin720\itap0\pararsid9978280 {
+\f1\fs18\insrsid9978280 The following are all l}{\f1\fs18\insrsid9978280\charrsid15491475 icensed under the GNU General Public License, Version 2:
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid14361219
+\par }\pard \qj \fi720\li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid15491475 Linux kernel binary image}{\f1\fs18\insrsid9978280 and corresponding source files for such image}{
+\f1\fs18\insrsid9978280\charrsid15491475
+\par self test smsc9118 pseudo code
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280
+\par {\listtext\pard\plain\s30 \f1\fs18\insrsid9978280\charrsid2258847 \hich\af1\dbch\af0\loch\f1 C.\tab}}\pard\plain \s30\qj \fi-720\li720\ri0\widctlpar\aspalpha\aspnum\faauto\ls8\adjustright\rin0\lin720\itap0\pararsid9978280
+\fs24\lang2057\langfe2057\cgrid\langnp2057\langfenp2057 {\f1\fs18\insrsid9978280\charrsid2258847 ARM Gator Profile driver and daemon }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid2258847
+licensed to you under the GNU General Public License version 2.0}{\f1\fs18\insrsid9978280
+\par }\pard \s30\qj \li720\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin720\itap0\pararsid9978280 {\f1\fs18\insrsid9978280\charrsid2258847
+\par }\pard\plain \qj \li720\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin720\itap0\pararsid9978280 \fs20\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280
+To the extent that ARM is obliged to do so, }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 ARM hereby offers to supply the }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280
+files which are subject to the GNU General Public Licence version 2 (identified above), }{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 in source code form, subject to the terms of the GNU General Public License }{
+\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280 v}{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 ersion 2}{\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280 , upon request}{
+\f1\fs18\lang1024\langfe1024\noproof\insrsid9978280\charrsid15491475 . This offer is valid for three (3) years from the date of your acceptance of this Licence. }{\f1\fs18\insrsid9978280\charrsid15491475
+\par }\pard \qj \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid9978280 {\f1\fs18\insrsid9978280
+\par }{\f1\fs18\insrsid9978280\charrsid15491475 /end
+\par
+\par ARM contract references: V}{\f1\fs18\insrsid9978280 ersatile }{\f1\fs18\insrsid9978280\charrsid15491475 E}{\f1\fs18\insrsid9978280 xpress }{\f1\fs18\insrsid9978280\charrsid15491475 DVD}{\f1\fs18\insrsid9978280 V7}{
+\f1\fs18\insrsid9978280\charrsid15491475 .0
+\par }\pard \ql \li0\ri0\widctlpar\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0 {\f1\fs18\insrsid9978280\charrsid8127988
+\par }} \ No newline at end of file