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authorRyan Harkin <ryan.harkin@linaro.org>2013-06-14 13:40:09 +0100
committerRyan Harkin <ryan.harkin@linaro.org>2013-06-14 13:50:47 +0100
commitbcf2914ff036a2505f41cd0014340cf8feff5c5a (patch)
tree08ae1a8b61d6c0fd965cc64519ea6d1e2f61add4
parentaa495330fac68d9e2220510cc25040ab92500f6d (diff)
Linaro Firmware for 13.01 release
These files were used in the Linaro Firmware overlay for the 13.01 release: https://wiki.linaro.org/ARM/VersatileExpress?action=AttachFile&do=get&target=vemsd-armlt-20130129-002.zip The release can be found here: http://releases.linaro.org/13.01/ubuntu/vexpress/ http://releases.linaro.org/13.01/android/vexpress/ The changes will configure u-boot on A5 and TC1, UEFI on A9 and Boot Monitor on TC2. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
-rw-r--r--SITE1/HBI0191B/images.txt21
-rw-r--r--SITE1/HBI0225B/images.txt25
-rw-r--r--SITE1/HBI0237A/images.txt8
-rw-r--r--SITE1/HBI0249A/board.txt21
-rw-r--r--SITE1/HBI0249A/dbb_v107.ebfbin0 -> 29012 bytes
-rw-r--r--SITE1/HBI0249A/images.txt31
-rw-r--r--SOFTWARE/A5/u-boot.binbin190368 -> 0 bytes
-rw-r--r--SOFTWARE/A5/uefi.binbin0 -> 3145728 bytes
-rw-r--r--SOFTWARE/TC1/u-boot.binbin191280 -> 0 bytes
-rw-r--r--SOFTWARE/TC1/uefi.binbin0 -> 3145728 bytes
-rw-r--r--SOFTWARE/TC2/bootscr.txt4
-rw-r--r--SOFTWARE/TC2/initrd.binbin206058 -> 0 bytes
-rw-r--r--SOFTWARE/TC2/tc2_dtb.binbin9726 -> 0 bytes
-rw-r--r--SOFTWARE/TC2/uefi.binbin0 -> 720896 bytes
-rw-r--r--SOFTWARE/TC2/zimage.binbin3811072 -> 0 bytes
-rw-r--r--SOFTWARE/bm_v517r.axfbin0 -> 197828 bytes
-rw-r--r--SOFTWARE/bootscr.txt2
-rw-r--r--readme.txt161
18 files changed, 40 insertions, 233 deletions
diff --git a/SITE1/HBI0191B/images.txt b/SITE1/HBI0191B/images.txt
index fc0f25d..7072499 100644
--- a/SITE1/HBI0191B/images.txt
+++ b/SITE1/HBI0191B/images.txt
@@ -1,18 +1,9 @@
TITLE: Versatile Express Images Configuration File
[IMAGES]
-TOTALIMAGES: 3 ;Number of Images (Max : 32)
-NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE
-NOR0ADDRESS: BOOT ;Image Flash Address
-NOR0FILE: \SOFTWARE\bm_v517l.axf ;Image File Name
-
-NOR1UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR1ADDRESS: 41000000 ;Image Flash Address
-NOR1FILE: \SOFTWARE\kernel.bin ;Image File Name
-NOR1LOAD: 60008000 ;Image Load Address
-NOR1ENTRY: 60008000 ;Image Entry Point
-
-NOR2UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR2ADDRESS: 40000000 ;Image Flash Address
-NOR2NAME: BOOTSCRIPT ;Image Name
-NOR2FILE: \SOFTWARE\booscr9.txt ;Image File Name
+TOTALIMAGES: 1 ;Number of Images (Max : 32)
+NOR0UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
+NOR0ADDRESS: 44000000 ;Image Flash Address
+NOR0FILE: \SOFTWARE\A9\uefi.bin ;Image File Name
+NOR0LOAD: 44000000 ;Image Load Address
+NOR0ENTRY: 44000000 ;Image Entry Point
diff --git a/SITE1/HBI0225B/images.txt b/SITE1/HBI0225B/images.txt
index a802070..f1691aa 100644
--- a/SITE1/HBI0225B/images.txt
+++ b/SITE1/HBI0225B/images.txt
@@ -1,24 +1,7 @@
TITLE: Versatile Express Images Configuration File
[IMAGES]
-TOTALIMAGES: 3 ;Number of Images (Max : 32)
-NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE
-NOR0ADDRESS: BOOT ;Image Flash Address
-NOR0FILE: \SOFTWARE\bm_v517r.axf ;Image File Name
-
-NOR1UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR1ADDRESS: 00000000 ;Image Flash Address
-NOR1NAME: BOOTSCRIPT ;Image Name
-NOR1FILE: \SOFTWARE\booscr5s.txt ;Image File Name
-
-NOR2UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR2ADDRESS: 00000000 ;Image Flash Address
-NOR2FILE: \SOFTWARE\ca5s.dtb ;Image File Name
-NOR2LOAD: 88000000 ;Image Load Address
-NOR2ENTRY: 00000000 ;Image Entry Point
-
-NOR3UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR3ADDRESS: 01000000 ;Image Flash Address
-NOR3FILE: \SOFTWARE\kernel.bin ;Image File Name
-NOR3LOAD: 80008000 ;Image Load Address
-NOR3ENTRY: 80008000 ;Image Entry Point
+TOTALIMAGES: 1 ;Number of Images (Max : 32)
+NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE
+NOR0ADDRESS: BOOT ;Image Flash Address
+NOR0FILE: \SOFTWARE\A5\uefi.bin ;Image File Name
diff --git a/SITE1/HBI0237A/images.txt b/SITE1/HBI0237A/images.txt
index 2f538b4..58c0c0d 100644
--- a/SITE1/HBI0237A/images.txt
+++ b/SITE1/HBI0237A/images.txt
@@ -1,7 +1,7 @@
TITLE: Versatile Express Images Configuration File
[IMAGES]
-TOTALIMAGES: 1 ;Number of Images (Max : 32)
-NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE
-NOR0ADDRESS: BOOT ;Image Flash Address
-NOR0FILE: \SOFTWARE\bm_v517r.axf ;Image File Name
+TOTALIMAGES: 1 ;Number of Images (Max : 32)
+NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE
+NOR0ADDRESS: BOOT ;Image Flash Address
+NOR0FILE: \SOFTWARE\TC1\uefi.bin ;Image File Name
diff --git a/SITE1/HBI0249A/board.txt b/SITE1/HBI0249A/board.txt
index 48e17f2..3a0f7ee 100644
--- a/SITE1/HBI0249A/board.txt
+++ b/SITE1/HBI0249A/board.txt
@@ -34,14 +34,17 @@ OSC7: 50.0 ;SYSREFCLK (20:1 - 1.0GHz, ACLK - 500MHz)
OSC8: 50.0 ;DDR2 (8:1 - 400MHz)
[SCC REGISTERS]
-TOTALSCCS: 32 ;Total Number of SCC registers
-SCC: 0x018 0x1FFFFFFF ;Reset control (CA7s running, CA15s running) - uncomment this for normal operation
-;SCC: 0x018 0x1FFFF000 ;Reset control - (CA7s running, CA15s reset) - uncomment this to hold A15 cluster in reset
-;SCC: 0x018 0x00001FFF ;Reset control - (CA7s reset, CA15s running) - uncomment this to hold A7 cluster in reset
+TOTALSCCS: 31 ;Total Number of SCC registers
SCC: 0x01C 0xFF00FF00 ;CFGRW3 - SMC CS6/7 N/U
SCC: 0x118 0x01CD1011 ;CFGRW17 - HDLCD PLL external bypass
-SCC: 0x700 0x00320003 ;CFGRW48 - Boot cluster and CPU (CA15[0]) - uncomment this to boot on A15 cluster
-;SCC: 0x700 0x10320003 ;CFGRW48 - Boot cluster and CPU (CA7[0]) - uncomment this to boot on A7 cluster
+;SCC: 0x700 0x00320003 ;CFGRW48 - [25:24]Boot CPU [28]Boot Cluster (default CA7_0)
+SCC: 0x700 0x0032F003 ;CFGRW48 - [25:24]Boot CPU [28]Boot Cluster (default CA7_0)
+ ; Bootmon configuration:
+ ; [15]: A7 Event stream generation (default: disabled)
+ ; [14]: A15 Event stream generation (default: disabled)
+ ; [13]: Power down the non-boot cluster (default: disabled)
+ ; [12]: Use per-cpu mailboxes for power management (default: disabled)
+ ; [11]: A15 executes WFEs as nops (default: disabled)
;Set the CPU clock PLLs
SCC: 0x120 0x022F1010 ;CFGRW19 - CA15_0 PLL control - 20:1 (lock OFF)
@@ -54,8 +57,10 @@ SCC: 0x138 0x022F1010 ;CFGRW25 - CA7_1 PLL control - 20:1 (lock OFF)
SCC: 0x13C 0x0011710D ;CFGRW26 - CA7_1 PLL value
;Power management interface
-SCC: 0xC00 0x00000003 ;Control (enable power management)
-SCC: 0xC04 0x000005DC ;Latency in uS
+;SCC: 0xC00 0x00000001 ;Control: [0]PMI_EN [1]DBG_EN [2]SPC_SYSCFG
+SCC: 0xC00 0x00000005 ;Control: [0]PMI_EN [1]DBG_EN [2]SPC_SYSCFG
+;SCC: 0xC04 0x000005DC ;Latency in uS max: [15:0]DVFS [31:16]PWRUP
+SCC: 0xC04 0x060E0356 ;Latency in uS max: [15:0]DVFS [31:16]PWRUP
SCC: 0xC08 0x00000000 ;Reserved
SCC: 0xC0C 0x00000000 ;Reserved
diff --git a/SITE1/HBI0249A/dbb_v107.ebf b/SITE1/HBI0249A/dbb_v107.ebf
new file mode 100644
index 0000000..f26716b
--- /dev/null
+++ b/SITE1/HBI0249A/dbb_v107.ebf
Binary files differ
diff --git a/SITE1/HBI0249A/images.txt b/SITE1/HBI0249A/images.txt
index d03cf9f..8b83d26 100644
--- a/SITE1/HBI0249A/images.txt
+++ b/SITE1/HBI0249A/images.txt
@@ -1,26 +1,19 @@
TITLE: Versatile Express Images Configuration File
[IMAGES]
-TOTALIMAGES: 4 ;Number of Images (Max: 32)
-
-NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE
-NOR0ADDRESS: BOOT ;Image Flash Address
+TOTALIMAGES: 3 ;Number of Images (Max : 32)
+NOR0UPDATE: AUTO ;Image Update:NONE/AUTO/FORCE
+NOR0ADDRESS: BOOT ;Image Flash Address
NOR0FILE: \SOFTWARE\bm_v519r.axf ;Image File Name
-NOR1UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR1ADDRESS: 00000000 ;Image Flash Address
-NOR1NAME: BOOTSCRIPT ;Image Flash Name
-NOR1FILE: \SOFTWARE\booscr15.txt ;Image File Name
+NOR1UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
+NOR1ADDRESS: 00000000 ;Image Flash Address
+NOR1NAME: BOOTSCRIPT ;Image Flash Name
+NOR1FILE: \SOFTWARE\TC2\bootscr.txt ;Image File Name
-NOR2UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR2ADDRESS: 00000000 ;Image Flash Address
-NOR2FILE: \SOFTWARE\ca15a7.dtb ;Image File Name
-NOR2LOAD: 88000000 ;Image Load Address
-NOR2ENTRY: 00000000 ;Image Entry Point
+NOR2UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
+NOR2ADDRESS: 0d000000 ;Image Flash Address
+NOR2FILE: \SOFTWARE\TC2\uefi.bin ;Image File Name
+NOR2LOAD: 81000000 ;Image Load Address
+NOR2ENTRY: 81000000 ;Image Entry Point
-NOR3UPDATE: AUTO ;IMAGE UPDATE:NONE/AUTO/FORCE
-NOR3ADDRESS: 00000000 ;Image Flash Address
-NOR3NAME: kernel ;Image Flash Name
-NOR3FILE: \SOFTWARE\kernel.bin ;Image File Name
-NOR3LOAD: 80008000 ;Image Load Address
-NOR3ENTRY: 80008000 ;Image Entry Point
diff --git a/SOFTWARE/A5/u-boot.bin b/SOFTWARE/A5/u-boot.bin
deleted file mode 100644
index 640f2b1..0000000
--- a/SOFTWARE/A5/u-boot.bin
+++ /dev/null
Binary files differ
diff --git a/SOFTWARE/A5/uefi.bin b/SOFTWARE/A5/uefi.bin
new file mode 100644
index 0000000..7ea6df8
--- /dev/null
+++ b/SOFTWARE/A5/uefi.bin
Binary files differ
diff --git a/SOFTWARE/TC1/u-boot.bin b/SOFTWARE/TC1/u-boot.bin
deleted file mode 100644
index db8acad..0000000
--- a/SOFTWARE/TC1/u-boot.bin
+++ /dev/null
Binary files differ
diff --git a/SOFTWARE/TC1/uefi.bin b/SOFTWARE/TC1/uefi.bin
new file mode 100644
index 0000000..e7e0410
--- /dev/null
+++ b/SOFTWARE/TC1/uefi.bin
Binary files differ
diff --git a/SOFTWARE/TC2/bootscr.txt b/SOFTWARE/TC2/bootscr.txt
index b80e9c5..7a87a93 100644
--- a/SOFTWARE/TC2/bootscr.txt
+++ b/SOFTWARE/TC2/bootscr.txt
@@ -1,3 +1 @@
-fl linux fdt tc2_dtb
-fl linux initrd initrd
-fl linux boot zimage console=tty0 console=ttyAMA0,38400n8 rootwait ro init=/init androidboot.console=ttyAMA0 mmci.fmax=12000000
+flash run uefi
diff --git a/SOFTWARE/TC2/initrd.bin b/SOFTWARE/TC2/initrd.bin
deleted file mode 100644
index 48cad35..0000000
--- a/SOFTWARE/TC2/initrd.bin
+++ /dev/null
Binary files differ
diff --git a/SOFTWARE/TC2/tc2_dtb.bin b/SOFTWARE/TC2/tc2_dtb.bin
deleted file mode 100644
index f102428..0000000
--- a/SOFTWARE/TC2/tc2_dtb.bin
+++ /dev/null
Binary files differ
diff --git a/SOFTWARE/TC2/uefi.bin b/SOFTWARE/TC2/uefi.bin
new file mode 100644
index 0000000..e6cf7e0
--- /dev/null
+++ b/SOFTWARE/TC2/uefi.bin
Binary files differ
diff --git a/SOFTWARE/TC2/zimage.bin b/SOFTWARE/TC2/zimage.bin
deleted file mode 100644
index c58d2b8..0000000
--- a/SOFTWARE/TC2/zimage.bin
+++ /dev/null
Binary files differ
diff --git a/SOFTWARE/bm_v517r.axf b/SOFTWARE/bm_v517r.axf
new file mode 100644
index 0000000..f9f1fde
--- /dev/null
+++ b/SOFTWARE/bm_v517r.axf
Binary files differ
diff --git a/SOFTWARE/bootscr.txt b/SOFTWARE/bootscr.txt
deleted file mode 100644
index e67e44a..0000000
--- a/SOFTWARE/bootscr.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-flash run u-boot
-
diff --git a/readme.txt b/readme.txt
deleted file mode 100644
index 9569a32..0000000
--- a/readme.txt
+++ /dev/null
@@ -1,161 +0,0 @@
-This patch to Versatile Express DVD version 5.0 provides
-an updated Boot Monitor as well as updated DCC firmware
-for the CoreTile Express A15x2 A7x3 (V2P-CA15-A7) processor
-board.
-
-The updates are mandatory to be able to use the unified power
-management support for the big.LITTLE MP & CPU migration mode
-of operation in the Linaro Linux kernel. These changes will be
-introduced in version 13.01 of the kernel.
-
-The patch contains the following files:
-
-bm_v519r.axf - Boot Monitor
-dbb_v110.ebf - DCC firmware
-readme.txt - the text file you are reading now
-
-------------
-DCC Firmware
-------------
-
-This release of the DCC firmware is not compatible with pre-13.01
-kernels (i.e. existing releases of the Linaro Linux kernel).
-However, the previous version of the DCC firmware (dbb_v107.ebf)
-and pre-13.01 releases of the kernel may be used with this release
-of the Boot Monitor as mentioned below.
-
-------------
-Boot Monitor
-------------
-
-1. Compatibility with Linaro Linux kernel releases.
-
- Power management support for the TC2 coretile has been reworked for the
- 13.01 kernel release. Broadly, this means that per-cpu mailbox registers
- are used to a) bringup secondary cpus during smp bringup & b) implement
- warm resets. Linux kernel releases prior to 13.01 used the sys_flags
- registers (part of the versatile express motherboard memory map) to do
- the same.
-
- The Bootmon firmware is compatible with both 13.01 and the releases
- preceding it. Comptability with pre 13.01 Linaro Linux kernels is
- referred to as 'backward compatibility'. The mode of operation of
- bootmon can be configured by manipulating bit[12] in the SCC register
- offset 0x700 (SCC System Information Register) in the board.txt file.
-
- a. bit[12]=1: Bootmon is compatible with the 13.01 release of the
- Linaro linux kernel. It uses per-cpu mailboxes to
- implement warm resets & for secondary cpu bringup.
-
- b. bit[12]=0: Bootmon is compatible with pre 13.01 releases of the
- Linaro linux kernel. It uses sys_flags register to
- implement warm resets for secondary cpu bringup.
-
- This bit should be set to 0 if power management support
- has been disabled in the Linux kernel configuration.
-
- To summarize, the following combinations of the firmware and the
- linux kernel are expected to be compatible:
-
- a. dbb_v107.ebf (dcc fw) + bm_v519r.axf (bootmon fw) + pre-13.01
- release of the Linaro linux kernel + board.txt which has bit[12]
- of SCC register offset 0x700 unset.
-
- b. dbb_v110.ebf (dcc fw) + bm_v519r.axf (bootmon fw) + 13.01 release
- of the Linaro linux kernel + board.txt which has bit[12] of SCC
- register offset 0x700 set.
-
-2. Support for TC2 coretile event propagation errata
-
- The TC2 coretile has a bug in the implementation of the logic
- that's responsible for delivering events (e.g. generated by the
- 'sev' instruction) across the A15 and A7 clusters. Inter-cluster
- events can be lost if the two clusters are operating at certain
- OPP (operating point) combinations. This can cause a CPU to wait
- for an event ('wfe' instruction) indefinitely e.g. while trying to
- acquire a spin lock in the linux kernel.
-
- Bootmon can be configured to work around this issue. This is done
- by generating a periodic event stream (every 32K cycles) on each CPU
- to make up for any lost events. Configuration is done by manipulating
- the following bits of the SCC register offset 0x700 (SCC System
- information register) in the board.txt as follows:
-
- a. bit[14]=1: Each A15 cpu generates an event stream every 32K cycles.
-
- b. bit[14]=0: Event stream generation is not configured on the A15 cpus.
-
- c. bit[15]=1: Each A7 cpu generates an event stream every 32K cycles.
-
- f. bit[15]=0: Event stream generation is not configured on the A7 cpus.
-
- Setting both the bits in the SCC register is expected to provide a reliable
- workaround of the errata.
-
-3. Support for powering down the non-boot cluster.
-
- To save power it might be desirable to keep the non-boot cluster powered
- down till the operating system (Linux) does not explicitly bringup cpus
- in that cluster either as a part of smp bringup or through a hotplug request.
-
- Bootmon can be configured to power down the non-boot cluster by manipulating
- the SCC register offset 0x700 (SCC System information register) in the
- board.txt as follows:
-
- a. bit[13]=1: Bootmon powers down the non-boot cluster.
-
- b. bit[13]=0: Bootmon does not power down the non-boot cluster.
-
-
-------------
-Installation
-------------
-
-There is no automatic installation method for this patch.
-To install the patch you must manually copy the files on
-to the Micro-SD card of your Versatile Express motherboard,
-and then update the relevant image.txt and board.txt files
-so that they point to the updated firmware and Boot Monitor.
-
-Proceed as follows:
-
-1) copy bm_v519r.axf to the motherboard in this location:
-
- \SOFTWARE\bm_v519r.axf
-
-
-2) copy dbb_v110.ebf to the motherboard in this location:
-
- \SITE1\HBI0249A\dbb_v110.ebf
-
-
-3) edit the file on the motherboard:
-
- \SITE1\HBI0249A\board.txt
-
- to change the line:
-
- M0FILE: dbb_v107.ebf ;DCC0 Filename
-
- so that it becomes:
-
- M0FILE: dbb_v110.ebf ;DCC0 Filename
-
-
-4) edit the file on the motherboard:
-
- \SITE1\HBI0249A\images.txt
-
- to change the line:
-
- NOR0FILE: \SOFTWARE\bm_v517r.axf ;Image File Name
-
- so that it becomes:
-
- NOR0FILE: \SOFTWARE\bm_v519r.axf ;Image File Name
-
-
-It is possible that additional changes to these text
-files will be needed - please see the instructions that
-come with the Linaro kernel for details of any further
-changes that are necessary.