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-rw-r--r--docs/02-Code-layout.txt72
1 files changed, 55 insertions, 17 deletions
diff --git a/docs/02-Code-layout.txt b/docs/02-Code-layout.txt
index 32a2a9a..4444135 100644
--- a/docs/02-Code-layout.txt
+++ b/docs/02-Code-layout.txt
@@ -145,8 +145,8 @@ B Code layout overview
1. Simple perl script that takes an ELF image of
the Virtualizer, parses through the relevant
sections & adds those sections to the scatter
- file so that a consolidated image can be
- created.
+ file so that a consolidated image can be
+ created.
2. big-little/common
@@ -317,18 +317,15 @@ B Code layout overview
as a trigger to initiate a switchover
asynchronously.
- 2. sync_switchover.c
+ 2. Exports a function [signal_switchover()] which
+ can be used to trigger a async/synchronous
+ switch.
- 1. Contains code to handle an HVC instructions
- executed by the payload software:
+ 3. Implements logic to ensure that only the cpus
+ which have not been hot-plugged are switched
+ to the inbound cluster.
- a. to initiate a synchronous switchover.
- ("HVC #1").
-
- b. to find the id of the cluster on which
- its currently executing. ("HVC #2").
-
- 3. handle_switchover.s
+ 2. handle_switchover.s
1. Contains code to start saving the non-secure
world context and request the secure world to
@@ -362,7 +359,7 @@ B Code layout overview
block will be trapped in the HYP mode.
Accesses to memory mapped peripherals e.g. shared vGIC
- can betrapped into the HYP mode by populating
+ can be trapped into the HYP mode by populating
appropriate entries in the 2nd stage translation tables.
This is how microarchitectural differences between the
two processor sets are resolved.
@@ -380,7 +377,7 @@ B Code layout overview
System Control Block. Once it knows the host cluster id
& whether the software is expected to switch execution
or run in the MP mode (provided at compile time), the
- CPU Can configure itself accordingly.
+ CPU can configure itself accordingly.
The processor cluster for which the payload software has
been built to run on [assumed to be Cortex-A15 for this
@@ -426,6 +423,18 @@ B Code layout overview
handlers exported by the processor on
which the trap has been invoked.
+ 2. It invokes a synchronous cluster switch if the
+ appropriate 'HVC' instruction is issued by the
+ payload software. Please refer to
+ "docs/09-HVC-calling-conventions.pdf" for details
+ of this 'HVC' API.
+
+ 3. It returns the value of the physical MPIDR
+ register if the appropriate 'HVC' instruction
+ is issued by the payload software. Please refer
+ to "docs/09-HVC-calling-conventions.pdf" for
+ details of this 'HVC' API.
+
3. virt_context.c
1. Generic function that saves and restores traps
@@ -456,15 +465,31 @@ B Code layout overview
to the Kingfisher System Control Block. This is
usually done to start a cpu hotplug operation.
+ 8. pmu_trap_handler.c
+
+ 1. Generic function that enables the use of PMU
+ with the Virtualizer software as per the design
+ detailed in:
+
+ 'docs/10-ARM-Virtualizer-support-for-debug-and-the-PMU.pdf'
+
7. include/
Header files specific to the Virtualisor code.
8. cpus/
- Placeholders for any traps that the Cortex-A7 or A15 processor
- cluster might want to setup. No traps need to be setup
- at the moment.
+ Allows implementation of trap handling specific to the
+ Cortex-A7 or A15 processors.
+
+ 1. a15/a15.c
+ 2. a7/a7.c
+
+ 1. The differences between the I-cache topologies of
+ the Cortex-A7 & A15 processors cannot be handled
+ within the existing abstraction of HOST & TARGET
+ clusters. These differences are treated as cpu-
+ specific and handled within these two files.
9. big-little/secure_world
@@ -576,3 +601,16 @@ B Code layout overview
Contains routines to save and restore ARM processor
context.
+
+ 3. v7_c.c
+
+ Contains routines to save and restore a processor's
+ debug subsystem state. State is saved through the
+ cp14 interface for v7.1 of the debug subsystem &
+ through the memory mapped interface for v7.0.
+
+ 4. debug_helpers.s
+ 5. debug_helpers.h
+
+ Helper functions to save and restore the ARM Debug
+ subsystem context.