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-rw-r--r--big-little/include/misc.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/big-little/include/misc.h b/big-little/include/misc.h
index 4656d00..f5ada31 100644
--- a/big-little/include/misc.h
+++ b/big-little/include/misc.h
@@ -1,23 +1,23 @@
/*
* Copyright (c) 2012, ARM Limited. All rights reserved.
- *
+ *
* Redistribution and use in source and binary forms, with
* or without modification, are permitted provided that the
* following conditions are met:
- *
+ *
* Redistributions of source code must retain the above
- * copyright notice, this list of conditions and the
+ * copyright notice, this list of conditions and the
* following disclaimer.
*
* Redistributions in binary form must reproduce the
- * above copyright notice, this list of conditions and
- * the following disclaimer in the documentation
+ * above copyright notice, this list of conditions and
+ * the following disclaimer in the documentation
* and/or other materials provided with the distribution.
- *
+ *
* Neither the name of ARM nor the names of its
* contributors may be used to endorse or promote products
* derived from this software without specific prior written
- * permission.
+ * permission.
*/
#ifndef MISC_H
@@ -150,8 +150,8 @@
#define TTBR_SH 0x1
#define TTBR_WBWA 0x1
-/*
- * Bit definitions of Level 2 translation
+/*
+ * Bit definitions of Level 2 translation
* table entries.
*/
@@ -160,8 +160,8 @@
#define BLOCK_MAPPING 0x1
#define TABLE_MAPPING 0x3
-/*
- * Bit definitions of Level 3 translation
+/*
+ * Bit definitions of Level 3 translation
* table entries.
*/
@@ -236,7 +236,7 @@
#define read_cci_cntr(x) read32(CCI_PERF_CNT(x) + CNT_REG)
/*
* TODO:
- * Move platform specific definitions to the right places
+ * Move platform specific definitions to the right places
*/
#define KFSCB_BASE 0x60000000
@@ -270,7 +270,7 @@
/*
* Map the 4 tubes to the Secure
- * & non-secure worlds
+ * & non-secure worlds
*/
#define SEC_TUBE0 KFS_TUBE0
#define SEC_TUBE1 KFS_TUBE1
@@ -384,8 +384,8 @@
#define CRN_C9 0x9
#define CRN_C15 0xf
-/*
- * Opcode2 definitions in the corresponding cp15 instruction
+/*
+ * Opcode2 definitions in the corresponding cp15 instruction
*/
#define MIDR 0x0
#define CTR 0x1