diff options
author | Dave Martin <dave.martin@linaro.org> | 2011-12-16 11:41:59 +0000 |
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committer | Dave Martin <dave.martin@linaro.org> | 2011-12-16 11:41:59 +0000 |
commit | 9945995974f51e86ff8a5e3162c47e1019ce9a08 (patch) | |
tree | 254d310b4a81e31f5ea2ab914b3cb9e643bf64a6 /bootwrapper/emubuild.s |
arm-virtualizer: Initial import of v2.1 releasearm_v2.1
From Release_Notes.txt:
ARM Virtualizer software release v2.1
This software release is a v2.1 snapshot of the ARM Virtualizer
software.
The ARM Virtualizer software is example code that demonstrates
cluster context switching capability on a coherent dual cluster
system composed of a Cortex-A7 cluster and a Cortex-A15 cluster.
The intent behind this delivery is to allow inspection of the
software architecture and to demonstrate existing functionality.
It is possible to execute the ARM Virtualizer software on a
Kingfisher Real-Time System Model (RTSM VE Cortex-A15 KF CCI
version 6.2 Beta).
Diffstat (limited to 'bootwrapper/emubuild.s')
-rw-r--r-- | bootwrapper/emubuild.s | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/bootwrapper/emubuild.s b/bootwrapper/emubuild.s new file mode 100644 index 0000000..b487015 --- /dev/null +++ b/bootwrapper/emubuild.s @@ -0,0 +1,52 @@ + ; + ; Copyright (c) 2011, ARM Limited. All rights reserved. + ; + ; Redistribution and use in source and binary forms, with + ; or without modification, are permitted provided that the + ; following conditions are met: + ; + ; Redistributions of source code must retain the above + ; copyright notice, this list of conditions and the + ; following disclaimer. + ; + ; Redistributions in binary form must reproduce the + ; above copyright notice, this list of conditions and + ; the following disclaimer in the documentation + ; and/or other materials provided with the distribution. + ; + ; Neither the name of ARM nor the names of its + ; contributors may be used to endorse or promote products + ; derived from this software without specific prior written + ; permission. + ; + +;; CPSR Mode bits definitions +USR_MODE EQU 16 +FIQ_MODE EQU 17 +IRQ_MODE EQU 18 +SVC_MODE EQU 19 +MON_MODE EQU 22 +ABT_MODE EQU 23 +UND_MODE EQU 27 +SYS_MODE EQU 31 + +;; CPSR mask bit definitions +CPSR_A EQU (1<<8) +CPSR_I EQU (1<<7) +CPSR_F EQU (1<<6) + +;; Control Register bits definition +CR_U EQU (1<<22) +CR_I EQU (1<<12) +CR_C EQU (1<<2) +CR_M EQU (1<<0) +CR_W EQU (1<<3) +CR_Z EQU (1<<11) +CR_XP EQU (1<<23) + +PAGE_MASK EQU ~0xfff + +CLIENT_ACCESS EQU 0x55555555 +MANAGER_ACCESS EQU 0xffffffff + + END |