diff options
author | Robin Randhawa <robin.randhawa@arm.com> | 2012-02-16 16:54:06 +0000 |
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committer | Robin Randhawa <robin.randhawa@arm.com> | 2012-02-16 16:55:09 +0000 |
commit | 813834c76ac48f29a4e1f67bb341ff0d0911b414 (patch) | |
tree | f9aa160817422c3c77ea913ec501221f85996948 /big-little/virtualisor/vgic_trap_handler.c | |
parent | 48aa177c0c3e38dc84728df705e50ba924b6f424 (diff) |
GNU indent pass over C and header files.
Basically:
$ for f in $(find . -name "*.[ch]"; do indent -linux $f; done
Signed-off-by: Robin Randhawa <robin.randhawa@arm.com>
Diffstat (limited to 'big-little/virtualisor/vgic_trap_handler.c')
-rw-r--r-- | big-little/virtualisor/vgic_trap_handler.c | 91 |
1 files changed, 45 insertions, 46 deletions
diff --git a/big-little/virtualisor/vgic_trap_handler.c b/big-little/virtualisor/vgic_trap_handler.c index 44469fb..4e626d0 100644 --- a/big-little/virtualisor/vgic_trap_handler.c +++ b/big-little/virtualisor/vgic_trap_handler.c @@ -18,7 +18,7 @@ * contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. - */ + */ #include "virtualisor.h" #include "gic_registers.h" @@ -31,52 +31,51 @@ */ void handle_vgic_distif_abort(unsigned pa, unsigned *data, unsigned write) { - unsigned value = 0, reg_offset = pa & 0xfff; + unsigned value = 0, reg_offset = pa & 0xfff; - switch (reg_offset >> 7) { - - /* Access to Processor Target registers */ - case (GICD_CPUS >> 7): - if (write) { - /* - * OS is trying to reprogram the processor targets register. - * Find out the cpu interface mask for this cluster and use - * that instead to program the register. - */ - value = get_cpuif_mask(*data); - write32(pa, value); - } else { - value = read32(pa); - *data = get_cpu_mask(value); - } + switch (reg_offset >> 7) { - break; - - /* Access to Software generated interrupt register */ - case (GICD_SW >> 7): - if (write) { - /* Get the updated cpu interface mask */ - value = get_cpuif_mask((*data >> 16) & 0xff) << 16; - value |= *data & ~(0xff << 16); - /* - * Clear the old cpu interface mask & update - * value with new cpu interface mask - */ - write32(pa, value); - } else { - /* Cannot possibly have a read from SGI generation register */ - } - - break; - - default: - if (write) { - write32(pa, *data); - } else { - *data = read32(pa); - } - } + /* Access to Processor Target registers */ + case (GICD_CPUS >> 7): + if (write) { + /* + * OS is trying to reprogram the processor targets register. + * Find out the cpu interface mask for this cluster and use + * that instead to program the register. + */ + value = get_cpuif_mask(*data); + write32(pa, value); + } else { + value = read32(pa); + *data = get_cpu_mask(value); + } - return; -} + break; + + /* Access to Software generated interrupt register */ + case (GICD_SW >> 7): + if (write) { + /* Get the updated cpu interface mask */ + value = get_cpuif_mask((*data >> 16) & 0xff) << 16; + value |= *data & ~(0xff << 16); + /* + * Clear the old cpu interface mask & update + * value with new cpu interface mask + */ + write32(pa, value); + } else { + /* Cannot possibly have a read from SGI generation register */ + } + break; + + default: + if (write) { + write32(pa, *data); + } else { + *data = read32(pa); + } + } + + return; +} |