Update release notes to v2.2.

Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>

1 files changed, 108 insertions, 94 deletions

diff --git a/Release_Notes.txt b/Release_Notes.txt
index ab5b56f..eba4bca 100644
--- a/Release_Notes.txt
+++ b/Release_Notes.txt
@@ -4,12 +4,12 @@ Release notes
 1.  Preface
 
     a.  Proprietary notice
-    
+
         Copyright (c) 2012, ARM Limited
         All rights reserved.
-        
-	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
-	CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
+
+        THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+        CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
         WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
         WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
         PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
@@ -25,37 +25,37 @@ Release notes
     b.  License details
 
         Copyright (c) 2009-12, ARM Limited. All rights reserved.
-        
-	Redistribution and use in source and binary forms, with
+
+        Redistribution and use in source and binary forms, with
         or without modification, are permitted provided that the
         following conditions are met:
-      
-	 * Redistributions of source code must retain the above
-	   copyright notice,
-	   this list of conditions and the following disclaimer.
-
-	 * Redistributions in binary form must reproduce the
-	   above copyright notice,
-	   this list of conditions and the following disclaimer
-           in the documentation and/or other materials provided 
+
+         * Redistributions of source code must retain the above
+           copyright notice,
+           this list of conditions and the following disclaimer.
+
+         * Redistributions in binary form must reproduce the
+           above copyright notice,
+           this list of conditions and the following disclaimer
+           in the documentation and/or other materials provided
            with the distribution.
 
-	 * Neither the name of ARM nor the names of its
-	   contributors may be used to endorse or promote products
+         * Neither the name of ARM nor the names of its
+           contributors may be used to endorse or promote products
            derived from this software without specific prior written
-           permission.                        
-        
+           permission.
+
     c.  Document confidentiality status
 
         Redistribution of source and compiled code is subject to the
         license terms above.
-    
+
     d.  Product status
-    
-        ARM Virtualizer for Cortex-A15/Cortex-A7 Task Migration v2.1
+
+        ARM Virtualizer for Cortex-A15/Cortex-A7 Task Migration v2.2
 
     e.  Web address
-        
+
         Not applicable.
 
     f.  Feedback on the ARM Virtualizer software
@@ -70,24 +70,24 @@ Release notes
 
     a.  Product release status
 
-        v2.1
+        v2.2
 
-    b.  ARM Virtualizer software release v2.1
+    b.  ARM Virtualizer software release v2.2
 
-        This software release is a v2.1 snapshot of the ARM 
-        Virtualizer software. 
-        
-        The ARM Virtualizer software is example code that demonstrates 
-        cluster context switching capability on a coherent dual 
-        cluster system composed of a Cortex-A7 cluster and a 
+        This software release is a v2.2 snapshot of the ARM
+        Virtualizer software.
+
+        The ARM Virtualizer software is example code that demonstrates
+        cluster context switching capability on a coherent dual
+        cluster system composed of a Cortex-A7 cluster and a
         Cortex-A15 cluster.
 
-        The intent behind this delivery is to allow        
-        inspection of the software architecture and to 
+        The intent behind this delivery is to allow
+        inspection of the software architecture and to
         demonstrate existing functionality.
-    
+
         It is possible to execute the ARM Virtualizer software on a
-        Kingfisher Real-Time System Model (RTSM VE Cortex-A15 KF CCI 
+        Kingfisher Real-Time System Model (RTSM VE Cortex-A15 KF CCI
         version 6.2 Beta).
 
         This model may be obtained from ARM by separate arrangement.
@@ -96,102 +96,116 @@ Release notes
 
         This release contains the following file:
 
-        1. arm-virtualizer-v2_1-171111.tar.bz2
+        1. arm-virtualizer-v2_2-100212.tar.bz2
 
-            - Contains source code for a basic boot wrapper. 
-              
-              This boot wrapper performs minimal system initialization 
-              and boots the system with the Virtualizer code. It also 
-              permits booting the system with an optional Linux kernel 
-              image and an accompanying root filesystem [both NOT 
+            - Contains source code for a basic boot wrapper.
+
+              This boot wrapper performs minimal system initialization
+              and boots the system with the Virtualizer code. It also
+              permits booting the system with an optional Linux kernel
+              image and an accompanying root filesystem [both NOT
               supplied with this release].
 
             - Contains source code for the ARM Virtualizer software.
 
-            - Contains pertinent documentation covering the 
+            - Contains pertinent documentation covering the
               release components, their installation and usage.
 
     d.  Functionality included
 
-        This release of the ARM Virtualizer software is capable of rapid 
-        and robust cluster context switching on a coherent system 
-        between a cluster of up to four Cortex-A7 processors and a 
+        This release of the ARM Virtualizer software is capable of rapid
+        and robust cluster context switching on a coherent system
+        between a cluster of up to four Cortex-A7 processors and a
         cluster of up to four Cortex-A15 processors.
 
-        In addition, this release of the ARM Virtualizer software 
-        permits payload software (bare-metal software or a Linux 
-        operating system kernel) built for the Cortex-A15 processor 
+        In addition, this release of the ARM Virtualizer software
+        permits payload software (bare-metal software or a Linux
+        operating system kernel) built for the Cortex-A15 processor
         cluster to run un-modified on a Cortex-A7 processor cluster.
 
-        This release does not support execution of software built for the 
+        This release does not support execution of software built for the
         Cortex-A7 cluster on the Cortex-A15 cluster.
 
     e.  New features
 
         1.  Code optimizations have been done to lower the number of cycles
-	    taken to switch payload software execution between the two clusters.
-	    An internal cycle accurate emulation platform was used to perform 
-	    the optimizations. It is not possible to undertake the same activity
-	    on the ARM FastModels. The changes mostly center around:
+            taken to switch payload software execution between the two clusters.
+            An internal cycle accurate emulation platform was used to perform
+            the optimizations. It is not possible to undertake the same activity
+            on the ARM FastModels. The changes mostly center around:
 
-	    a. Replacement & rework of C code by assembler routines for
-	       initialising the Secure Monitor and HYP mode environment after a
-	       warm reset.
+            a. Replacement & rework of C code by assembler routines for
+               initialising the Secure Monitor and HYP mode environment after a
+               warm reset.
 
-	    b. Context of the vGIC shared distributor interface is not saved any
-	       longer. Since the interface maintains its state across a switch,
-	       changes are made to it directly while restoring context on the 
-	       inbound cluster.
+            b. Context of the vGIC shared distributor interface is not saved any
+               longer. Since the interface maintains its state across a switch,
+               changes are made to it directly while restoring context on the
+               inbound cluster.
 
-	    c. MMU is enabled as soon as possible after a warm reset to minimize
-	       strongly ordered accesses. 
+            c. MMU is enabled as soon as possible after a warm reset to minimize
+               strongly ordered accesses.
 
-	    d. Barrier instructions are being used more optimally.
+            d. Barrier instructions are being used more optimally.
 
-	    e. The copy_words() routine which was used to save and restore the vGIC
-	       context using word sized loads and stores has been replaced by the
-	       memcpy() library routine. Depending upon the number of bytes that
-	       need to be transferred, it chooses an optimal way of saving and	
-	       restoring context.
+            e. The copy_words() routine which was used to save and restore the vGIC
+               context using word sized loads and stores has been replaced by the
+               memcpy() library routine. Depending upon the number of bytes that
+               need to be transferred, it chooses an optimal way of saving and
+               restoring context.
 
-	2.  The variant field of the KFS_ID register is used to distinguish 
-	    between the FastModels and other platform types.
+        2.  The variant field of the KFS_ID register is used to distinguish
+            between the FastModels and other platform types.
 
     f.  Known issues
 
-        1.  This release does not support execution of software 
-            built for the Cortex-A7 cluster on the Cortex-A15 
+        1.  This release does not support execution of software
+            built for the Cortex-A7 cluster on the Cortex-A15
             cluster.
 
         2.  This release is intended to be built in a Linux development
             environment. Environments other than Linux are not supported.
 
-        3.  The snoop hit rate calculation support depends on per-CPU tube 
-            constructs. These are currently only present in internal development 
-            versions of the ARM FastModels. A forthcoming release of the ARM 
-            FastModels will incorporate this functionality. For the moment, 
-            attempts to write to non-existent tubes will be treated as a no-op.  
+        3.  The snoop hit rate calculation support depends on per-CPU tube
+            constructs. These are currently only present in internal development
+            versions of the ARM FastModels. A forthcoming release of the ARM
+            FastModels will incorporate this functionality. For the moment,
+            attempts to write to non-existent tubes will be treated as a no-op.
             (See docs/04-Cache-hit-rate-howto.txt for details).
 
-        4.  This release provides instructions to build and run 
-            large filesystems with the Virtualizer. The use of 
-            large filesystems with the current FastModels 
-            release (RTSM VE Cortex-A15 KF CCI version 
+        4.  This release provides instructions to build and run
+            large filesystems with the Virtualizer. The use of
+            large filesystems with the current FastModels
+            release (RTSM VE Cortex-A15 KF CCI version
             6.2 Beta) is known to be unstable.
 
     g.  Issues resolved since last release
 
         1.  Bug fixes
 
-            1.  vGIC HYP view interface handling code in (common/vgiclib.c) now 
-		detects the number of implemented list registers from the vgic
-		type register instead of assuming that the maximum (64) will be
-		present. 
+            v2.1:
+
+            1.  vGIC HYP view interface handling code in (common/vgiclib.c) now
+                detects the number of implemented list registers from the vgic
+                type register instead of assuming that the maximum (64) will be
+                present.
+
+            v2.1 to v2.2:
+
+            1.  Issue an DCCISW and not a DCCSW when DCCSIW was trapped in
+                trap_cp15_mrc_mcr_handle (big-little/virtualisor/virt_handle.c).
+
+            2.  Calculate l2_desc correctly in CreateL3PageTable
+                (big-little/common/pagetable_setup.c) for level equal 2.
+
+            3.  Create second 4KB 2nd stage mapping for VGIC in
+                Create2ndStagePageTables
+                (big-little/common/pagetable_setup.c).
 
     h.  Test cases and results
 
         1.  This release has been tested for correct cluster switching
-            operation at ~12 million cycle switching intervals with 
+            operation at ~12 million cycle switching intervals with
             bare-metal and Linux kernel payloads.
 
         2.  This release has been tested using a select subset of an ARM
@@ -209,17 +223,17 @@ Release notes
 
     02-Code-layout.txt: Overview of the code layout.
 
-    03-Linux-kernel-build.txt: Instructions on obtaining and 
+    03-Linux-kernel-build.txt: Instructions on obtaining and
     building a Linux kernel image suitable for the virtualizer.
 
-    04-Cache-hit-rate-howto.txt: Description of the MTI trace 
-    plugin infrastructure and ways to use the trace for 
+    04-Cache-hit-rate-howto.txt: Description of the MTI trace
+    plugin infrastructure and ways to use the trace for
     estimating snoop hit rates across cluster switches.
 
-    05-FAQ.txt: Placeholder for commonly asked questions with 
+    05-FAQ.txt: Placeholder for commonly asked questions with
     answers.
 
-    06-Optional-rootfs-build.txt: Instructions for building and 
+    06-Optional-rootfs-build.txt: Instructions for building and
     using rootfilesystems with the virtualizer.
 
 4.  Tools
@@ -228,7 +242,7 @@ Release notes
 
         1.  ARM RealView Development Suite version 4.1 [Build 514].
 
-        2.  Kingfisher Real-Time System Model (RTSM VE Cortex-A15 KF CCI 
+        2.  Kingfisher Real-Time System Model (RTSM VE Cortex-A15 KF CCI
             version 6.2 Beta).
 
     b.  Operating systems
@@ -245,6 +259,6 @@ Release notes
     incorporate any feedback in subsequent releases of this example
     software.
 
-    Any feedback can be routed through Steve Bannister, Software 
+    Any feedback can be routed through Steve Bannister, Software
     Development Manager: steve.bannister@arm.com