Cleanup and rename builtins.h to match .S

Signed-off-by: Greg Bellows <greg.bellows@linaro.org>

13 files changed, 78 insertions, 176 deletions

diff --git a/common/aarch64/arm_builtins.h b/common/aarch64/builtins.h
index b31cbfb..43bb67b 100644
--- a/common/aarch64/arm_builtins.h
+++ b/common/aarch64/builtins.h
@@ -1,41 +1,8 @@
-#ifndef _ARM_BUILTINS_H
-#define _ARM_BUILTINS_H
+#ifndef _BUILTINS_H
+#define _BUILTINS_H
 
 #include "stdint.h"
 
-#define CPTR_TFP    (1 << 10)
-#define CPTR_TCPAC  (1 << 31)
-#define SCTLR_nTWI  (1 << 16)
-#define SCTLR_nTWE  (1 << 18)
-#define SCR_WFI     (1 << 12)
-#define SCR_WFE     (1 << 13)
-
-#define __get_exception_return(_addr) \
-    asm volatile("mrs x0, currentel\n"  \
-                 "cmp x0, #0x4\n"   \
-                 "b.eq elrel1\n"   \
-                 "cmp x0, #0x8\n"   \
-                 "b.eq elrel2\n"   \
-                 "elrel3: mrs %0, elr_el3\n"   \
-                 "b elrdone\n"   \
-                 "elrel2: mrs %0, elr_el2\n"   \
-                 "b elrdone\n"   \
-                 "elrel1: mrs %0, elr_el1\n"   \
-                 "elrdone:\n" : "=r" (_addr))
-
-#define __get_exception_address(_addr) \
-    asm volatile("mrs x0, currentel\n"  \
-                 "cmp x0, #0x4\n"   \
-                 "b.eq farel1\n"   \
-                 "cmp x0, #0x8\n"   \
-                 "b.eq farel2\n"   \
-                 "farel3: mrs %0, far_el3\n"   \
-                 "b fardone\n"   \
-                 "farel2: mrs %0, far_el2\n"   \
-                 "b fardone\n"   \
-                 "farel1: mrs %0, far_el1\n"   \
-                 "fardone:\n" : "=r" (_addr))
-
 extern uint64_t read_currentel();
 extern void write_currentel(uint64_t);
 extern uint64_t read_scr_el3();
diff --git a/common/aarch64/cpu.h b/common/aarch64/cpu.h
index 72167df..6699813 100644
--- a/common/aarch64/cpu.h
+++ b/common/aarch64/cpu.h
@@ -24,7 +24,12 @@
 #define SCR_TWE     (1 << 13)
 
 #define CPACR_FPEN(_v) ((_v) << 20)
+
 #define CPTR_TFP    (1 << 10)
+#define CPTR_TCPAC  (1 << 31)
+
+#define SCTLR_nTWI  (1 << 16)
+#define SCTLR_nTWE  (1 << 18)
 
 #define SPSR_EL0    PSTATE_EL_EL0
 #define SPSR_EL1    PSTATE_EL_EL1T
diff --git a/common/arm/arm_builtins.h b/common/arm/arm_builtins.h
deleted file mode 100644
index a5c044d..0000000
--- a/common/arm/arm_builtins.h
+++ /dev/null
@@ -1,128 +0,0 @@
-#ifndef _ARM_BUILTINS_H
-#define _ARM_BUILTINS_H
-
-#include <stdint.h>
-
-#define CPTR_TFP    (1 << 10)
-#define CPTR_TCPAC  (1 << 31)
-#define SCTLR_nTWI  (1 << 16)
-#define SCTLR_nTWE  (1 << 18)
-#define SCR_WFI     (1 << 12)
-#define SCR_WFE     (1 << 13)
-
-#define __get_exception_return(_addr) \
-    asm volatile("mov r0, r0\n")
-
-#define __get_exception_address(_addr) \
-    asm volatile("mov r0, r0\n")
-
-extern uintptr_t read_scr();
-extern void write_scr(uintptr_t);
-extern uintptr_t read_sder();
-extern void write_sder(uintptr_t);
-extern uintptr_t read_cptr();
-extern void write_cptr(uintptr_t);
-extern uintptr_t read_cpacr();
-extern void write_cpacr(uintptr_t);
-extern uintptr_t read_cpacr();
-extern void write_cpacr(uintptr_t);
-extern uintptr_t read_sctlr();
-extern void write_sctlr(uintptr_t);
-extern uintptr_t read_mvbar();
-extern void write_mvbar(uintptr_t);
-extern uintptr_t read_nsacr();
-extern void write_nsacr(uintptr_t);
-extern uintptr_t read_dfar();
-extern void write_dfsr(uintptr_t);
-extern uintptr_t read_dfsr();
-extern void write_dfar(uintptr_t);
-extern uintptr_t read_ifar();
-extern void write_ifar(uintptr_t);
-extern uintptr_t read_ifsr();
-extern void write_ifsr(uintptr_t);
-extern uintptr_t read_cpsr();
-extern void write_cpsr(uintptr_t);
-extern void __set_exception_return(uintptr_t);
-extern void __exception_return(uintptr_t, uint32_t);
-
-#define READ_SCR() read_scr()
-#define WRITE_SCR(_val) write_scr(_val)
-#define READ_SDER() read_sder()
-#define WRITE_SDER(_val) write_sder(_val)
-#define READ_CPACR() read_cpacr()
-#define WRITE_CPACR(_val) write_cpacr(_val)
-#define READ_MVBAR() read_mvbar()
-#define WRITE_MVBAR(_val) write_mvbar(_val)
-#define READ_NSACR() read_nsacr()
-#define WRITE_NSACR(_val) write_nsacr(_val)
-#define READ_CPSR() read_cpsr()
-#define WRITE_CPSR(_val) write_cpsr(_val)
-#define READ_SCTLR() read_sctlr()
-#define WRITE_SCTLR(_val) write_sctlr(_val)
-
-#if REMOVE_OR_INTEGRATE
-#define __cps(_r0) asm volatile ("cps %[r0]\n":: [r0] "X" (_r0))
-
-#define __srsdb_svc(_mode) asm volatile ("srsdb sp!, #0x13\n")
-
-#define __pop(_r0) \
-    asm volatile ("pop {%[r0]}\n" : [r0] "=r" (_r0))
-
-#define __mrc(_cp, _opc1, _r0, _crm, _crn, _opc2)                           \
-    asm volatile (                                                          \
-        "mrc p"#_cp", "#_opc1", %[r0], c"#_crm", c"#_crn", "#_opc2"\n"      \
-        : [r0] "=r" (_r0)                                                   \
-    )
-
-#define __mcr(_cp, _opc1, _r0, _crm, _crn, _opc2)                           \
-    asm volatile (                                                          \
-        "mcr p"#_cp", "#_opc1", %[r0], c"#_crm", c"#_crn", "#_opc2"\n"      \
-        : : [r0] "r" (_r0)                                                  \
-    )
-
-#define _READCP(_reg, _cp, _opc1, _crm, _crn, _opc2)    \
-    static inline uint32_t _read_##_reg() {             \
-        volatile int _r0 = -1;                          \
-        __mrc(_cp, _opc1, _r0, _crm, _crn, _opc2);      \
-        return _r0;                                     \
-    }
-
-#define _WRITECP(_reg, _cp, _opc1, _crm, _crn, _opc2)       \
-    static inline uint32_t  _write_##_reg(uint32_t _r0) {   \
-        __mcr(_cp, _opc1, _r0, _crm, _crn, _opc2);          \
-        return 0;                                           \
-    }
-
-#define _RWCP(_reg, _cp, _opc1, _crm, _crn, _opc2)  \
-    _READCP(_reg, _cp, _opc1, _crm, _crn, _opc2)    \
-    _WRITECP(_reg, _cp, _opc1, _crm, _crn, _opc2)
-
-_RWCP(scr, 15, 0, 1, 1, 0)           /* _read/write_scr */
-_RWCP(sder, 15, 0, 1, 1, 1)          /* _read/write_sder */
-_RWCP(nsacr, 15, 0, 1, 1, 2)         /* _read/write_nsacr */
-_RWCP(mvbar, 15, 0, 12, 0, 1)        /* _read/write_mvbar */
-
-/* Banked read/write CP register definitions */
-_RWCP(csselr, 15, 2, 0, 0, 0)        /* _read/write_csselr */
-_RWCP(sctlr, 15, 0, 1, 0, 0)         /* _read/write_sctlr */
-_RWCP(actlr, 15, 0, 1, 0, 1)         /* _read/write_actlr */
-_RWCP(ttbr0, 15, 0, 2, 0, 0)         /* _read/write_ttbr0 */
-_RWCP(ttbr1, 15, 0, 2, 0, 1)         /* _read/write_ttbr1 */
-_RWCP(ttbcr, 15, 0, 2, 0, 2)         /* _read/write_ttbcr */
-_RWCP(dacr, 15, 0, 3, 0, 0)          /* _read/write_dacr */
-_RWCP(dfsr, 15, 0, 5, 0, 0)          /* _read/write_dfsr */
-_RWCP(ifsr, 15, 0, 5, 0, 1)          /* _read/write_ifsr */
-_RWCP(dfar, 15, 0, 6, 0, 0)          /* _read/write_dfar */
-_RWCP(ifar, 15, 0, 6, 0, 2)          /* _read/write_ifar */
-_RWCP(par, 15, 0, 7, 4, 0)           /* _read/write_par */
-_RWCP(prrr, 15, 0, 10, 2, 0)         /* _read/write_prrr */
-_RWCP(nmrr, 15, 0, 10, 2, 1)         /* _read/write_nmrr */
-_RWCP(vbar, 15, 0, 12, 0, 0)         /* _read/write_vbar */
-_RWCP(fcseidr, 15, 0, 13, 0, 0)      /* _read/write_fcseidr */
-_RWCP(contextidr, 15, 0, 13, 0, 1)   /* _read/write_contextidr*/
-_RWCP(tpidrurw, 15, 0, 13, 0, 2)     /* _read/write_tpidrurw */
-_RWCP(tpidruro, 15, 0, 13, 0, 3)     /* _read/write_tpidruro */
-_RWCP(tpidrprw, 15, 0, 13, 0, 4)     /* _read/write_tpidrprw */
-
-#endif
-#endif
diff --git a/common/arm/builtins.h b/common/arm/builtins.h
new file mode 100644
index 0000000..efe7f41
--- /dev/null
+++ b/common/arm/builtins.h
@@ -0,0 +1,50 @@
+#ifndef _BUILTINS_H
+#define _BUILTINS_H
+
+#include <stdint.h>
+
+extern uintptr_t read_scr();
+extern void write_scr(uintptr_t);
+extern uintptr_t read_sder();
+extern void write_sder(uintptr_t);
+extern uintptr_t read_cptr();
+extern void write_cptr(uintptr_t);
+extern uintptr_t read_cpacr();
+extern void write_cpacr(uintptr_t);
+extern uintptr_t read_cpacr();
+extern void write_cpacr(uintptr_t);
+extern uintptr_t read_sctlr();
+extern void write_sctlr(uintptr_t);
+extern uintptr_t read_mvbar();
+extern void write_mvbar(uintptr_t);
+extern uintptr_t read_nsacr();
+extern void write_nsacr(uintptr_t);
+extern uintptr_t read_dfar();
+extern void write_dfsr(uintptr_t);
+extern uintptr_t read_dfsr();
+extern void write_dfar(uintptr_t);
+extern uintptr_t read_ifar();
+extern void write_ifar(uintptr_t);
+extern uintptr_t read_ifsr();
+extern void write_ifsr(uintptr_t);
+extern uintptr_t read_cpsr();
+extern void write_cpsr(uintptr_t);
+extern void __set_exception_return(uintptr_t);
+extern void __exception_return(uintptr_t, uint32_t);
+
+#define READ_SCR() read_scr()
+#define WRITE_SCR(_val) write_scr(_val)
+#define READ_SDER() read_sder()
+#define WRITE_SDER(_val) write_sder(_val)
+#define READ_CPACR() read_cpacr()
+#define WRITE_CPACR(_val) write_cpacr(_val)
+#define READ_MVBAR() read_mvbar()
+#define WRITE_MVBAR(_val) write_mvbar(_val)
+#define READ_NSACR() read_nsacr()
+#define WRITE_NSACR(_val) write_nsacr(_val)
+#define READ_CPSR() read_cpsr()
+#define WRITE_CPSR(_val) write_cpsr(_val)
+#define READ_SCTLR() read_sctlr()
+#define WRITE_SCTLR(_val) write_sctlr(_val)
+
+#endif
diff --git a/common/arm/cpu.h b/common/arm/cpu.h
index 68b4898..21f0a76 100644
--- a/common/arm/cpu.h
+++ b/common/arm/cpu.h
@@ -22,11 +22,19 @@
 #define SCR_SMD     SCR_SCD    /* For AArch64 compatability */
 #define SCR_HCE     (1 << 8)
 #define SCR_SIF     (1 << 9)
+#define SCR_TWI     (1 << 12)
+#define SCR_TWE     (1 << 13)
 
 #define CPACR_FPEN(_v) ((_v) << 20)
 
+#define CPTR_TFP    (1 << 10)
+#define CPTR_TCPAC  (1 << 31)
+
 #define NSACR_CP10  (1 << 10)
 
+#define SCTLR_nTWI  (1 << 16)
+#define SCTLR_nTWE  (1 << 18)
+
 #define CPSR_F      (1 << 6)
 #define CPSR_I      (1 << 7)
 #define CPSR_A      (1 << 8)
diff --git a/el0/el0_common.h b/el0/el0_common.h
index f7a6318..f8e1e6b 100644
--- a/el0/el0_common.h
+++ b/el0/el0_common.h
@@ -4,7 +4,7 @@
 #include "libcflat.h"
 #include "svc.h"
 #include "syscntl.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "debug.h"
 #include "state.h"
 
diff --git a/el1/el1_common.h b/el1/el1_common.h
index 8c07336..928f8ab 100644
--- a/el1/el1_common.h
+++ b/el1/el1_common.h
@@ -7,7 +7,7 @@
 #include "smc.h"
 #include "string.h"
 #include "el1.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "state.h"
 #include "debug.h"
 #include "syscntl.h"
diff --git a/el3/el3.c b/el3/el3.c
index ed0f986..5ca4759 100644
--- a/el3/el3.c
+++ b/el3/el3.c
@@ -11,7 +11,7 @@
 #include "smc.h"
 #include "svc.h"
 #include "el3_monitor.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "syscntl.h"
 #include "mem_util.h"
 #include "state.h"
diff --git a/tztest/el0/tztest_el0.c b/tztest/el0/tztest_el0.c
index 62e03eb..cbdab96 100644
--- a/tztest/el0/tztest_el0.c
+++ b/tztest/el0/tztest_el0.c
@@ -1,7 +1,7 @@
 #include "libcflat.h"
 #include "svc.h"
 #include "syscntl.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "exception.h"
 #include "state.h"
 #include "cpu.h"
@@ -222,7 +222,7 @@ uint32_t el0_check_wfx_trap(uint32_t __attribute__((unused))arg)
     /* Even though we set the SCR to trap WFE instructions to EL3, precedence
      * should be still given to EL1 as log as SCTLR.nTWE is clear.
      */
-    SVC_SET_REG(SCR, 3, scr | SCR_WFE);
+    SVC_SET_REG(SCR, 3, scr | SCR_TWE);
     TEST_MSG("WFE (SCTLR.nTWE clear, SCR.WFE set)");
     TEST_EL1_EXCEPTION(asm volatile("wfe\n"), EC_WFI_WFE);
 
@@ -242,7 +242,7 @@ uint32_t el0_check_wfx_trap(uint32_t __attribute__((unused))arg)
     /* Even though we set the SCR to trap WFI instructions to EL3, precedence
      * should be still given to EL1 as log as SCTLR.nTWI is clear.
      */
-    SVC_SET_REG(SCR, 3, scr | SCR_WFI);
+    SVC_SET_REG(SCR, 3, scr | SCR_TWI);
     TEST_MSG("WFI (SCTLR.nTWI clear, SCR.WFI set)");
     TEST_EL1_EXCEPTION(asm volatile("wfi\n"), EC_WFI_WFE);
 
diff --git a/tztest/el1/nonsecure/tztest_el1_nsec.c b/tztest/el1/nonsecure/tztest_el1_nsec.c
index c85225a..d8cc1cd 100644
--- a/tztest/el1/nonsecure/tztest_el1_nsec.c
+++ b/tztest/el1/nonsecure/tztest_el1_nsec.c
@@ -2,7 +2,7 @@
 #include "svc.h"
 #include "smc.h"
 #include "syscntl.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "exception.h"
 #include "state.h"
 #include "debug.h"
diff --git a/tztest/el1/secure/tztest_el1_sec.c b/tztest/el1/secure/tztest_el1_sec.c
index 94bfda2..2923b1a 100644
--- a/tztest/el1/secure/tztest_el1_sec.c
+++ b/tztest/el1/secure/tztest_el1_sec.c
@@ -2,7 +2,7 @@
 #include "svc.h"
 #include "smc.h"
 #include "syscntl.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "exception.h"
 #include "state.h"
 #include "debug.h"
diff --git a/tztest/el1/tztest_el1.c b/tztest/el1/tztest_el1.c
index 75333af..58e1228 100644
--- a/tztest/el1/tztest_el1.c
+++ b/tztest/el1/tztest_el1.c
@@ -2,7 +2,7 @@
 #include "svc.h"
 #include "smc.h"
 #include "syscntl.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "exception.h"
 #include "state.h"
 #include "cpu.h"
@@ -91,14 +91,14 @@ uint32_t el1_check_wfx_trap(uint32_t __attribute__((unused))arg)
 
     /* Clearing SCTLR.nTWE normally traps WFE to EL1 but we are already there */
     WRITE_SCTLR(sctlr & ~SCTLR_nTWE);
-    SMC_SET_REG(SCR, 3, scr & ~SCR_WFE);
+    SMC_SET_REG(SCR, 3, scr & ~SCR_TWE);
     TEST_MSG("WFE (SCTLR.nTWE clear, SCR.WFE clear)");
     TEST_NO_EXCEPTION(asm volatile("wfe\n"));
 
     /* Trap WFE instructions to EL3.  This should work regardless od the
      * SCTLR.nTWE setting.
      */
-    SMC_SET_REG(SCR, 3, scr | SCR_WFE);
+    SMC_SET_REG(SCR, 3, scr | SCR_TWE);
     TEST_MSG("WFE (SCTLR.nTWE clear, SCR.WFE set)");
     TEST_EL3_EXCEPTION(asm volatile("wfe\n"), EC_WFI_WFE);
 
@@ -117,7 +117,7 @@ uint32_t el1_check_wfx_trap(uint32_t __attribute__((unused))arg)
     /* Trap WFI instructions to EL3.  This should work regardless od the
      * SCTLR.nTWE setting.
      */
-    SMC_SET_REG(SCR, 3, scr | SCR_WFI);
+    SMC_SET_REG(SCR, 3, scr | SCR_TWI);
     TEST_MSG("WFI (SCTLR.nTWI clear, SCR.WFI set)");
     TEST_EL3_EXCEPTION(asm volatile("wfi\n"), EC_WFI_WFE);
 
diff --git a/tztest/el3/tztest_el3.c b/tztest/el3/tztest_el3.c
index d4e63b5..2453428 100644
--- a/tztest/el3/tztest_el3.c
+++ b/tztest/el3/tztest_el3.c
@@ -1,7 +1,7 @@
 #include "libcflat.h"
 #include "syscntl.h"
 #include "smc.h"
-#include "arm_builtins.h"
+#include "builtins.h"
 #include "exception.h"
 #include "state.h"
 #include "cpu.h"