diff options
author | Yvan Roux <yvan.roux@linaro.org> | 2017-08-09 15:49:10 +0200 |
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committer | Yvan Roux <yvan.roux@linaro.org> | 2017-08-09 15:49:10 +0200 |
commit | b219e31259d3b689fff295f7a7d1e38fbf1ebdcd (patch) | |
tree | bf895628fd387909cbec1b75e7fa1c7712ad2afd | |
parent | 33aa887c7454cbbe3c3d0331507293e74b851e08 (diff) |
Generated Release Notes for linaro-GCC-7.1-2017.08-rc1.releases/linaro-7.1-2017.08-rc1
-rw-r--r-- | components/toolchain/binaries/README.textile | 32 | ||||
-rw-r--r-- | components/toolchain/gcc-linaro/7/README.textile | 48 |
2 files changed, 56 insertions, 24 deletions
diff --git a/components/toolchain/binaries/README.textile b/components/toolchain/binaries/README.textile index e2995eb..e206616 100644 --- a/components/toolchain/binaries/README.textile +++ b/components/toolchain/binaries/README.textile @@ -1,8 +1,7 @@ - h1. The Linaro Binary Toolchain -The Linaro GCC 7.1-2017.05 Release is now available. +The Linaro GCC 7.1-2017.08-rc1 Release-Candidate is now available. *Notice*: GCC 7.1 ABI change for arm*-*-* targets, and note for aarch64*-*-* targets @@ -25,11 +24,11 @@ For help in porting to GCC 7 please see the following explanation: p((((. "https://gcc.gnu.org/gcc-7/porting_to.html":https://gcc.gnu.org/gcc-7/porting_to.html -Download release packages from: +Download release-candidate packages from: -p((((. (sources) "http://releases.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/":http://releases.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/ +p((((. (sources) "http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/":http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/ -p((((. (binaries) "http://releases.linaro.org/components/toolchain/binaries/7.1-2017.05/":http://releases.linaro.org/components/toolchain/binaries/7.1-2017.05/ +p((((. (binaries) "http://snapshots.linaro.org/components/toolchain/binaries/7.1-2017.08-rc1/":http://snapshots.linaro.org/components/toolchain/binaries/7.1-2017.08-rc1/ Previous snapshots and release-candidates are at: @@ -62,9 +61,9 @@ p((((. "https://bugs.linaro.org/show_bug.cgi?id=1869":https://bugs.linaro.org/sh h2. Package Versions -Linaro GCC 7.1-2017.05 +Linaro GCC 7.1-2017.08-rc1 -p((((. "http://releases.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/":http://releases.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/ +p((((. "http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/":http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.08-rc1/ FSF glibc 2.25 (release/2.25) @@ -92,16 +91,31 @@ Linaro toolchain package git branches are hosted at: p((((. "http://git.linaro.org/toolchain":http://git.linaro.org/toolchain -h2. NEWS for GCC 7 (as of Linaro GCC 7.1-2017.05) +h2. NEWS for GCC 7 (as of Linaro GCC 7.1-2017.08-rc1) + + +* The Linaro GCC 7.1-2017.07 snapshot added prefetching configuration improvement for AArch64 targets and laid groundwork to enabling prefetching in more cases. + + +* Previous MinGW hosted version of Linaro GCC C preprocessor failed to convert character set used for string, character constants, etc. This is fixed in this release. -* Performance related backports from the following snapshots have been included: Linaro GCC 7.1-2017.05. +p(((. Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8. + +p(((. "https://bugs.linaro.org/show_bug.cgi?id=3040":https://bugs.linaro.org/show_bug.cgi?id=3040 + + +* Performance related backports from the following snapshots have been included: Linaro GCC 7.1-2017.05, Linaro GCC 7.1-2017.06 and Linaro GCC 7.1-2017.07. p(((. See the following Linaro GCC snapshots: p(((. "http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/":http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/ +p(((. "http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.06/":http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.06/ + +p(((. "http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.07/":http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.07/ + h2. Contact Linaro diff --git a/components/toolchain/gcc-linaro/7/README.textile b/components/toolchain/gcc-linaro/7/README.textile index d961125..3ab6b6f 100644 --- a/components/toolchain/gcc-linaro/7/README.textile +++ b/components/toolchain/gcc-linaro/7/README.textile @@ -1,4 +1,4 @@ -p. The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.05 stable Release of the Linaro GCC 7 source package. +p. The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.08-rc1 stable Release-Candidate of the Linaro GCC 7 source package. p. The GCC 7 series introduced an ABI change for ARM targets by fixing a bug (present since GCC 5, see link below) that affects conformance to the procedure call standard (AAPCS). The bug affects some C++ code where class objects are passed by value to functions and could result in incorrect or inconsistent code being generated. If the option -Wpsabi is enabled (on by default) the compiler will emit a diagnostic note for code that might be affected by this ABI change. @@ -8,20 +8,38 @@ p. For an explanation of the changes please see the following website: p((((. "https://gcc.gnu.org/gcc-7/changes.html":https://gcc.gnu.org/gcc-7/changes.html -p. This stable[1] Release is based on FSF GCC 7.1.1+svn247824 and includes performance improvements and bug fixes backported from mainline GCC. This Release is based on "Linaro Snapshot GCC 7.1-2017.05-rc1":http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05-rc1. - -h4. Changes in this stable GCC source package Release include: - -* Updates merged from FSF GCC 7.1.1+svn247824 -* Backport of [AArch32] Allow combination of aprofile and rmprofile multilibs -* Backport of [AArch32] Define TM_MULTILIB_CONFIG for ARM multilib -* Backport of [AArch32] Rename FPSCR builtins to correct names -* Backport of [AArch32] Set mode for success result of atomic compare and swap -* Backport of [AArch64] Enable AUTOPREFETCHER_WEAK with -mcpu=generic -* Backport of [AArch64] Improve address cost for -mcpu=generic -* Backport of [AArch64] Update alignment for -mcpu=generic -* Backport of Support combining of LSHIFTRT + LSHIFTRT operations -* Backport of [Testsuite] Require c99_runtime for pr78622.c +p. This stable[1] Release-Candidate is based on FSF GCC 7.1.1+svn250046 and includes performance improvements and bug fixes backported from mainline GCC. This Release-Candidate is based on "Linaro Snapshot GCC 7.1-2017.07":http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.07. + +h4. Changes in this stable GCC source package Release-Candidate include: + +* Updates merged from FSF GCC 7.1.1+svn250046 +* Backport of [Bugfix] [AArch32] PR target/71778 ICE using non-constant argument to Neon intrinsic that requires constant arguments +* Backport of [Bugfix] [AArch64] PR target/71663 aarch64 Vector initialization can be improved slightly +* Backport of [AArch64] Simplify call, call_value, sibcall, sibcall_value patterns +* Backport of [AArch32] Enable FP16 vector arithmetic operations +* Backport of [Cleanup] [AArch32] Fix comment for cmse_nonsecure_call_clear_caller_saved +* Backport of [Testsuite] [AArch32] Add MOVT testing for ARMv8-M Baseline +* Backport of [Cleanup] [AArch32] Fix typo in comment in arm_expand_prologue +* Backport of [AArch32] Fix ARM bootstrap failure due to an odd warning +* Backport of [AArch64] Emit tighter strong atomic compare-exchange loop when comparing against zero +* Backport of [AArch64] Add HF vector modes to lane-to-lane INS pattern +* Backport of [AArch64] Allow CMP+SHIFT when comparing with zero +* Backport of [AArch64] Peephole for SUBS +* Backport of [AArch64] Use SUBS for parallel subtraction and comparison with immediate +* Backport of [AArch64] Add combine pattern for storing lane zero of a vector +* Backport of [Cleanup] [AArch32] Complete legend for ARM register allocation in arm.h +* Backport of [AArch64] Allow const0_rtx operand for atomic compare-exchange patterns +* Backport of [Misc] Add debug counter for loop array prefetching +* Backport of [Misc] Improve debug output of loop data prefetching +* Backport of [AArch64] Fix subreg bug in scalar copysign +* Backport of [AArch32] Modify idiv costs for Cortex-A53 +* Backport of [AArch64] Adjust costs so udiv is preferred over sdiv when both are valid +* Backport of [AArch64] Add prefetch configuration to aarch64 backend +* Backport of [AArch64] Enable -fprefetch-loop-arrays at given optimization level +* Backport of [AArch64] Update prefetch tuning parameters for qdf24xx. +* Backport of [AArch64] Fix -fstack-check with really big frames on aarch64 +* Backport of [Testsuite] Fix stack-check-1.c +* Backport of [Testsuite] Add dg-require-stack-check h4. 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