diff options
Diffstat (limited to 'gcc/config/rs6000/vsx.md')
-rw-r--r-- | gcc/config/rs6000/vsx.md | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 2745e445ff4..4ea8bc52edd 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2429,16 +2429,29 @@ }) ;; V2DF/V2DI splat -(define_insn "vsx_splat_<mode>" - [(set (match_operand:VSX_D 0 "vsx_register_operand" "=<VSa>,<VSa>,we") +(define_insn_and_split "vsx_splat_<mode>" + [(set (match_operand:VSX_D 0 "vsx_register_operand" + "=<VSa>, <VSa>,we,<VS_64dm>") (vec_duplicate:VSX_D - (match_operand:<VS_scalar> 1 "splat_input_operand" "<VS_64reg>,Z,b")))] + (match_operand:<VS_scalar> 1 "splat_input_operand" + "<VS_64reg>,Z, b, wA")))] "VECTOR_MEM_VSX_P (<MODE>mode)" "@ xxpermdi %x0,%x1,%x1,0 lxvdsx %x0,%y1 - mtvsrdd %x0,%1,%1" - [(set_attr "type" "vecperm,vecload,mftgpr")]) + mtvsrdd %x0,%1,%1 + #" + "&& reload_completed && TARGET_POWERPC64 && !TARGET_P9_VECTOR + && int_reg_operand (operands[1], <VS_scalar>mode)" + [(set (match_dup 2) + (match_dup 1)) + (set (match_dup 0) + (vec_duplicate:VSX_D (match_dup 2)))] +{ + operands[2] = gen_rtx_REG (<VS_scalar>mode, reg_or_subregno (operands[0])); +} + [(set_attr "type" "vecperm,vecload,vecperm,vecperm") + (set_attr "length" "4,4,4,8")]) ;; V4SI splat (ISA 3.0) ;; When SI's are allowed in VSX registers, add XXSPLTW support |