diff options
| author | Yvan Roux <yvan.roux@linaro.org> | 2017-09-11 10:49:29 +0200 |
|---|---|---|
| committer | Yvan Roux <yvan.roux@linaro.org> | 2017-09-13 14:08:48 +0000 |
| commit | ad57d66cd268a24aa9c20caa7b7ac0ad5e101d33 (patch) | |
| tree | c9cd5d5e6f83963d3bcce80d690b003db2914e05 | |
| parent | 7d4b980faf48288e03d334dd8f5afb21e7be3c73 (diff) | |
gcc/
Backport from trunk r249828.
2017-06-29 Julian Brown <julian@codesourcery.com>
Naveen H.S <Naveen.Hurugalawadi@cavium.com>
* config/aarch64/aarch64-fusion-pairs.def: Add ALU_BRANCH entry.
* config/aarch64/aarch64.c (AARCH64_FUSE_ALU_BRANCH): New fusion type.
(thunderx2t99_tunings): Set AARCH64_FUSE_ALU_BRANCH flag.
(aarch_macro_fusion_pair_p): Add support for AARCH64_FUSE_ALU_BRANCH.
Change-Id: Ib2125828f70dda5d8e65223bc01f7b71fa26901e
| -rw-r--r-- | gcc/config/aarch64/aarch64-fusion-pairs.def | 1 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.c | 46 |
2 files changed, 46 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64-fusion-pairs.def b/gcc/config/aarch64/aarch64-fusion-pairs.def index f0e6dbcdd81..300cd00e4bf 100644 --- a/gcc/config/aarch64/aarch64-fusion-pairs.def +++ b/gcc/config/aarch64/aarch64-fusion-pairs.def @@ -34,5 +34,6 @@ AARCH64_FUSION_PAIR ("movk+movk", MOVK_MOVK) AARCH64_FUSION_PAIR ("adrp+ldr", ADRP_LDR) AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH) AARCH64_FUSION_PAIR ("aes+aesmc", AES_AESMC) +AARCH64_FUSION_PAIR ("alu+branch", ALU_BRANCH) #undef AARCH64_FUSION_PAIR diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 54697b72134..2102dff301b 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -875,7 +875,8 @@ static const struct tune_params thunderx2t99_tunings = &generic_approx_modes, 4, /* memmov_cost. */ 4, /* issue_rate. */ - (AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_AES_AESMC), /* fusible_ops */ + (AARCH64_FUSE_CMP_BRANCH | AARCH64_FUSE_AES_AESMC + | AARCH64_FUSE_ALU_BRANCH), /* fusible_ops */ 16, /* function_align. */ 8, /* jump_align. */ 16, /* loop_align. */ @@ -14296,6 +14297,49 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) } } + if (aarch64_fusion_enabled_p (AARCH64_FUSE_ALU_BRANCH) + && any_condjump_p (curr)) + { + /* We're trying to match: + prev (alu_insn) == (set (r0) plus ((r0) (r1/imm))) + curr (cbz) == (set (pc) (if_then_else (eq/ne) (r0) + (const_int 0)) + (label_ref ("SYM")) + (pc)) */ + if (SET_DEST (curr_set) == (pc_rtx) + && GET_CODE (SET_SRC (curr_set)) == IF_THEN_ELSE + && REG_P (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) + && REG_P (SET_DEST (prev_set)) + && REGNO (SET_DEST (prev_set)) + == REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0))) + { + /* Fuse ALU operations followed by conditional branch instruction. */ + switch (get_attr_type (prev)) + { + case TYPE_ALU_IMM: + case TYPE_ALU_SREG: + case TYPE_ADC_REG: + case TYPE_ADC_IMM: + case TYPE_ADCS_REG: + case TYPE_ADCS_IMM: + case TYPE_LOGIC_REG: + case TYPE_LOGIC_IMM: + case TYPE_CSEL: + case TYPE_ADR: + case TYPE_MOV_IMM: + case TYPE_SHIFT_REG: + case TYPE_SHIFT_IMM: + case TYPE_BFM: + case TYPE_RBIT: + case TYPE_REV: + case TYPE_EXTEND: + return true; + + default:; + } + } + } + return false; } |