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/* SPDX-License-Identifier: GPL-2.0
*
* Copyright 2016-2020 HabanaLabs, Ltd.
* All Rights Reserved.
*
*/
/************************************
** This is an auto-generated file **
** DO NOT EDIT BELOW **
************************************/
#ifndef ASIC_REG_DCORE0_TPC0_CFG_AXUSER_REGS_H_
#define ASIC_REG_DCORE0_TPC0_CFG_AXUSER_REGS_H_
/*
*****************************************
* DCORE0_TPC0_CFG_AXUSER
* (Prototype: AXUSER)
*****************************************
*/
#define mmDCORE0_TPC0_CFG_AXUSER_HB_ASID 0x400BE00
#define mmDCORE0_TPC0_CFG_AXUSER_HB_MMU_BP 0x400BE04
#define mmDCORE0_TPC0_CFG_AXUSER_HB_STRONG_ORDER 0x400BE08
#define mmDCORE0_TPC0_CFG_AXUSER_HB_NO_SNOOP 0x400BE0C
#define mmDCORE0_TPC0_CFG_AXUSER_HB_WR_REDUCTION 0x400BE10
#define mmDCORE0_TPC0_CFG_AXUSER_HB_RD_ATOMIC 0x400BE14
#define mmDCORE0_TPC0_CFG_AXUSER_HB_QOS 0x400BE18
#define mmDCORE0_TPC0_CFG_AXUSER_HB_RSVD 0x400BE1C
#define mmDCORE0_TPC0_CFG_AXUSER_HB_EMEM_CPAGE 0x400BE20
#define mmDCORE0_TPC0_CFG_AXUSER_HB_CORE 0x400BE24
#define mmDCORE0_TPC0_CFG_AXUSER_E2E_COORD 0x400BE28
#define mmDCORE0_TPC0_CFG_AXUSER_HB_WR_OVRD_LO 0x400BE30
#define mmDCORE0_TPC0_CFG_AXUSER_HB_WR_OVRD_HI 0x400BE34
#define mmDCORE0_TPC0_CFG_AXUSER_HB_RD_OVRD_LO 0x400BE38
#define mmDCORE0_TPC0_CFG_AXUSER_HB_RD_OVRD_HI 0x400BE3C
#define mmDCORE0_TPC0_CFG_AXUSER_LB_COORD 0x400BE40
#define mmDCORE0_TPC0_CFG_AXUSER_LB_LOCK 0x400BE44
#define mmDCORE0_TPC0_CFG_AXUSER_LB_RSVD 0x400BE48
#define mmDCORE0_TPC0_CFG_AXUSER_LB_OVRD 0x400BE4C
#endif /* ASIC_REG_DCORE0_TPC0_CFG_AXUSER_REGS_H_ */
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