1 files changed, 61 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_nonsecured_regs.h b/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_nonsecured_regs.h
new file mode 100644
index 000000000000..32089b8250ed
--- /dev/null
+++ b/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_mme_qm_axuser_nonsecured_regs.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2016-2020 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+/************************************
+ ** This is an auto-generated file **
+ **       DO NOT EDIT BELOW        **
+ ************************************/
+
+#ifndef ASIC_REG_DCORE0_MME_QM_AXUSER_NONSECURED_REGS_H_
+#define ASIC_REG_DCORE0_MME_QM_AXUSER_NONSECURED_REGS_H_
+
+/*
+ *****************************************
+ *   DCORE0_MME_QM_AXUSER_NONSECURED
+ *   (Prototype: AXUSER)
+ *****************************************
+ */
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_ASID 0x40CAB80
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_MMU_BP 0x40CAB84
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_STRONG_ORDER 0x40CAB88
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_NO_SNOOP 0x40CAB8C
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_WR_REDUCTION 0x40CAB90
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_RD_ATOMIC 0x40CAB94
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_QOS 0x40CAB98
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_RSVD 0x40CAB9C
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_EMEM_CPAGE 0x40CABA0
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_CORE 0x40CABA4
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_E2E_COORD 0x40CABA8
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_WR_OVRD_LO 0x40CABB0
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_WR_OVRD_HI 0x40CABB4
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_RD_OVRD_LO 0x40CABB8
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_RD_OVRD_HI 0x40CABBC
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_LB_COORD 0x40CABC0
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_LB_LOCK 0x40CABC4
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_LB_RSVD 0x40CABC8
+
+#define mmDCORE0_MME_QM_AXUSER_NONSECURED_LB_OVRD 0x40CABCC
+
+#endif /* ASIC_REG_DCORE0_MME_QM_AXUSER_NONSECURED_REGS_H_ */