diff options
| author | Tushar Behera <tushar.behera@linaro.org> | 2013-06-06 13:50:59 +0530 |
|---|---|---|
| committer | Tushar Behera <tushar.behera@linaro.org> | 2013-06-06 13:58:55 +0530 |
| commit | 76c49d2c89dc77fb49d921abd2a0ad3c5f140319 (patch) | |
| tree | a12abcd3bf61c2bef8adde00143ec5b29e8c38f7 | |
| parent | cee22237714df4817e76c9b212cd9d73fb058715 (diff) | |
clk: exynos5250: Add CLK_IGNORE_UNUSED flag for pmu clockwip/arndale-kvm-3.10
Currently 'pmu' clock is not handled by any of the drivers.
Also before the introduction of CCF, this clock was not defined,
hence was left enabled always.
When this clock is disabled, software reset register becomes
inaccessible and system reboot doesn't work.
Upon restoring the default behaviour, system reboot starts working.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 5c97e75924a..3853da90718 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -378,7 +378,7 @@ struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { GATE(hsi2c3, "hsi2c3", "aclk66", GATE_IP_PERIC, 31, 0, 0), GATE(chipid, "chipid", "aclk66", GATE_IP_PERIS, 0, 0, 0), GATE(sysreg, "sysreg", "aclk66", GATE_IP_PERIS, 1, 0, 0), - GATE(pmu, "pmu", "aclk66", GATE_IP_PERIS, 2, 0, 0), + GATE(pmu, "pmu", "aclk66", GATE_IP_PERIS, 2, CLK_IGNORE_UNUSED, 0), GATE(tzpc0, "tzpc0", "aclk66", GATE_IP_PERIS, 6, 0, 0), GATE(tzpc1, "tzpc1", "aclk66", GATE_IP_PERIS, 7, 0, 0), GATE(tzpc2, "tzpc2", "aclk66", GATE_IP_PERIS, 8, 0, 0), |