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/*
* Copyright (C) 2016 Richtek Technology Corp.
*
* Author: TH <tsunghan_tsai@richtek.com>
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __LINUX_RT1711H_H
#define __LINUX_RT1711H_H
#include <linux/hisi/usb/pd/richtek/std_tcpci_v10.h>
/*show debug message or not */
#define ENABLE_RT1711_DBG 0
/* RT1711H Private RegMap */
#define RT1711H_REG_CLK_CTRL2 (0x87)
#define RT1711H_REG_CLK_CTRL3 (0x88)
#define RT1711H_REG_BMC_CTRL (0x90)
#define RT1711H_REG_BMCIO_RXDZSEL (0x93)
#define RT1711H_REG_VCONN_CLIMITEN (0x95)
#define RT1711H_REG_RT_STATUS (0x97)
#define RT1711H_REG_RT_INT (0x98)
#define RT1711H_REG_RT_MASK (0x99)
#define RT1711H_REG_IDLE_CTRL (0x9B)
#define RT1711H_REG_INTRST_CTRL (0x9C)
#define RT1711H_REG_WATCHDOG_CTRL (0x9D)
#define RT1711H_REG_I2CRST_CTRL (0X9E)
#define RT1711H_REG_SWRESET (0xA0)
#define RT1711H_REG_TTCPC_FILTER (0xA1)
#define RT1711H_REG_DRP_TOGGLE_CYCLE (0xA2)
#define RT1711H_REG_DRP_DUTY_CTRL (0xA3)
/*
* Device ID
*/
#define RT1711H_DID_A 0x2170
#define RT1711H_DID_B 0x2171
#define RT1711H_DID_C 0x2172
#ifndef BIT
#define BIT(x) (1 << (x))
#endif
/*
* RT1711H_REG_CLK_CTRL2 (0x87)
*/
#define RT1711H_REG_CLK_DIV_600K_EN BIT(7)
#define RT1711H_REG_CLK_BCLK2_EN BIT(6)
#define RT1711H_REG_CLK_BCLK2_TG_EN BIT(5)
#define RT1711H_REG_CLK_DIV_300K_EN BIT(3)
#define RT1711H_REG_CLK_CK_300K_EN BIT(2)
#define RT1711H_REG_CLK_BCLK_EN BIT(1)
#define RT1711H_REG_CLK_BCLK_TH_EN BIT(0)
/*
* RT1711H_REG_CLK_CTRL3 (0x88)
*/
#define RT1711H_REG_CLK_OSCMUX_RG_EN BIT(7)
#define RT1711H_REG_CLK_CK_24M_EN BIT(6)
#define RT1711H_REG_CLK_OSC_RG_EN BIT(5)
#define RT1711H_REG_CLK_DIV_2P4M_EN BIT(4)
#define RT1711H_REG_CLK_CK_2P4M_EN BIT(3)
#define RT1711H_REG_CLK_PCLK_EN BIT(2)
#define RT1711H_REG_CLK_PCLK_RG_EN BIT(1)
#define RT1711H_REG_CLK_PCLK_TG_EN BIT(0)
/*
* RT1711H_REG_BMC_CTRL (0x90)
*/
#define RT1711H_REG_IDLE_EN BIT(6)
#define RT1711H_REG_DISCHARGE_EN BIT(5)
#define RT1711H_REG_BMCIO_LPRPRD BIT(4)
#define RT1711H_REG_BMCIO_LPEN BIT(3)
#define RT1711H_REG_BMCIO_BG_EN BIT(2)
#define RT1711H_REG_VBUS_DET_EN BIT(1)
#define RT1711H_REG_BMCIO_OSC_EN BIT(0)
/*
* RT1711H_REG_RT_STATUS (0x97)
*/
#define RT1711H_REG_RA_DETACH BIT(5)
#define RT1711H_REG_VBUS_80 BIT(1)
/*
* RT1711H_REG_RT_INT (0x98)
*/
#define RT1711H_REG_INT_RA_DETACH BIT(5)
#define RT1711H_REG_INT_WATCHDOG BIT(2)
#define RT1711H_REG_INT_VBUS_80 BIT(1)
#define RT1711H_REG_INT_WAKEUP BIT(0)
/*
* RT1711H_REG_RT_MASK (0x99)
*/
#define RT1711H_REG_M_RA_DETACH BIT(5)
#define RT1711H_REG_M_WATCHDOG BIT(2)
#define RT1711H_REG_M_VBUS_80 BIT(1)
#define RT1711H_REG_M_WAKEUP BIT(0)
/*
* RT1711H_REG_IDLE_CTRL (0x9B)
*/
#define RT1711H_REG_CK_300K_SEL BIT(7)
#define RT1711H_REG_SHIPPING_OFF BIT(5)
#define RT1711H_REG_AUTOIDLE_EN BIT(3)
/* timeout = (tout*2+1) * 6.4ms */
#define RT1711H_REG_IDLE_SET(ck300, ship_dis, auto_idle, tout) \
(((ck300) << 7) | ((ship_dis) << 5) | \
((auto_idle) << 3) | ((tout) & 0x07))
/*
* RT1711H_REG_INTRST_CTRL (0x9C)
*/
#define RT1711H_REG_INTRST_EN BIT(7)
/* timeout = (tout+1) * 0.2sec */
#define RT1711H_REG_INTRST_SET(en, tout) \
(((en) << 7) | ((tout) & 0x03))
/*
* RT1711H_REG_WATCHDOG_CTRL (0x9D)
*/
#define RT1711H_REG_WATCHDOG_EN BIT(7)
/* timeout = (tout+1) * 0.4sec */
#define RT1711H_REG_WATCHDOG_CTRL_SET(en, tout) \
(((en) << 7) | ((tout) & 0x07))
#if ENABLE_RT1711_DBG
#define RT1711H_INFO hisilog_err
#else
#define RT1711_INFO(foramt, args...)
#endif
#endif /* #ifndef __LINUX_RT1711H_H */
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