diff options
author | Lina Iyer <lina.iyer@linaro.org> | 2017-03-03 13:48:17 -0800 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-03-14 17:37:13 +0100 |
commit | ac42c48d1986514822dc7636326692b295a059e5 (patch) | |
tree | 5566a87ef2bc573c4128041011d1a27ba007e113 | |
parent | af425052609f92118d58a239147c782bfed8d682 (diff) |
ARM64: dts: Define CPU power domain for MSM8916next_legacy
Define power domain and the power states for the domain as defined by
the PSCI firmware. The 8916 firmware supports OS initiated method of
powering off the CPU clusters.
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 53 |
1 files changed, 49 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index e51b04900726..d0bb0b9f66b4 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -112,7 +112,7 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD0>; }; CPU1: cpu@1 { @@ -121,7 +121,7 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD1>; }; CPU2: cpu@2 { @@ -130,7 +130,7 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD2>; }; CPU3: cpu@3 { @@ -139,7 +139,7 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; + power-domains = <&CPU_PD3>; }; L2_0: l2-cache { @@ -156,12 +156,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000010>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000030>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu { |