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tag namepinctrl-v5.19-3 (e5a50ed32cbe865d962c5c969072a84141ebcaa2)
tag date2022-07-22 14:17:28 +0200
tagged byLinus Walleij <linus.walleij@linaro.org>
tagged objectcommit 4546760619...
Pin control fixes for the v5.19 kernel cycle:
- NULL check for the ralink and sunplus drivers. - Add Jacky Bai as maintainer for the Freescale pin controllers. - Fix pin config ops for the Ocelot LAN966x and SparX5. - Disallow AMD pin control to be a module: the GPIO lines need to be active in early boot, so no can do. - Fix the Armada 37xx to use raw spinlocks in the interrupt handler path to avoid wait context. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmLali0ACgkQQRCzN7AZ XXOuKg//WiregNcNDBoc1RcIZAAd1qz7nTKsQECHMYlSpyD2NzV1s0gg6lzKFoLc LirJFBnlYg96CVbuq9Q6HK2K9+9M+DGFz0NbusEEJ9kJWeM2x+7wm1yYjeaYGR3v pb7rv51NJI2nbENJQIrWGaqDZghdOsKA6HXZPScgSeqpW3dAR7tyzM0kUx03qtHB s+szDxICaCQC9YwuCL1AIsDCg5Na2tb66hNKKY18EdlPVevYWSYuTCsUa6qAQHec KvKYkdL/tb13tqhCmWgs04fDe/qNXxpVBKHb1Bf7wqjyTtjQq2oa/gW69gNUNBX6 SgpQXYhX1yfZoafkGe+y11sC8TswoMwsBUUd9Rw1/N/Yer2Ghh6rdFREF8g5Lu+s DuA6yZi2qSmCskYdQvyVknZ1S73EJRZ2psZj4otT+t2Zufdw4gKx8JIovLZJnS4k KIptC7vyxOmsJq3m7g2Al8pZCRzavTdpl56KJ4jPj+U7pclVu4CMFFWUmRG42JMM iCzsBMo1Q8e/lzhQ/A93XDictl3cIeHfaQB8zAz6Mn/LcD2LpdIyqpg5df1ceScC NEG3O88nZ95n0iZF1g+OPSIQAj9FKyULgMs8J8WCxstzRidk8A4HwShcZDgeJCUw 11kXciB0hqqEpMBJ2aeMqQ/ApOyFG/dgktprzF1pucYO5om3syQ= =OQRx -----END PGP SIGNATURE-----