/*
 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 * Based on "omap4.dtsi"
 */

#include "dra7.dtsi"

/ {
	compatible = "ti,dra722", "ti,dra72", "ti,dra7";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0>;

			operating-points = <
				/* kHz    uV */
				1000000 1060000
				>;

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */

			/* cooling options */
			cooling-min-level = <0>;
			cooling-max-level = <2>;
			#cooling-cells = <2>; /* min followed by max */
		};
	};

	iva_coproc {
		compatible = "ti,coproc";
		clocks = <&dpll_iva_m2_ck>, <&dpll_iva_ck>;
		clock-names = "fclk", "dpll";
		clock-target-frequency = <532000000>;
		operating-points = <
			388200  1055000
			430000	1150000
			532000  1250000
			>;
		coproc-voltdm = <&voltdm_ivahd>;
		voltage-tolerance = <1>;
	};

	dsp_coproc {
		compatible = "ti,coproc";
		clocks = <&dpll_dsp_m2_ck>, <&dpll_dsp_ck>;
		clock-names = "fclk", "dpll";
		clock-target-frequency = <700000000>;
		operating-points = <
			600000  1055000
			700000	1150000
			700000  1250000
			>;
		coproc-voltdm = <&voltdm_dspeve>;
		voltage-tolerance = <1>;
	};

	thermal-zones {
		#include "omap5-cpu-thermal.dtsi"
	};

	aliases {
		rproc0 = &ipu1;
		rproc1 = &ipu2;
		rproc2 = &dsp1;
	};

	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>;
	};
};

&mailbox1 {
	mbox_ipu2: mbox_ipu2 {
		ti,mbox-tx = <0 0 0>;
		ti,mbox-rx = <1 0 0>;
		status = "disabled";
	};
	mbox_dsp1: mbox_dsp1 {
		ti,mbox-tx = <3 0 0>;
		ti,mbox-rx = <2 0 0>;
		status = "disabled";
	};
};

&mailbox2 {
	mbox_ipu1: mbox_ipu1 {
		ti,mbox-tx = <0 0 0>;
		ti,mbox-rx = <1 0 0>;
		status = "disabled";
	};
};

&mailbox5 {
	mbox_ipu1_legacy: mbox_ipu1_legacy {
		ti,mbox-tx = <6 2 2>;
		ti,mbox-rx = <4 2 2>;
		status = "disabled";
	};
	mbox_dsp1_legacy: mbox_dsp1_legacy {
		ti,mbox-tx = <5 2 2>;
		ti,mbox-rx = <1 2 2>;
		status = "disabled";
	};
};

&mailbox6 {
	mbox_ipu2_legacy: mbox_ipu2_legacy {
		ti,mbox-tx = <6 2 2>;
		ti,mbox-rx = <4 2 2>;
		status = "disabled";
	};
};