diff options
author | Liviu Dudau <Liviu.Dudau@arm.com> | 2014-07-21 12:36:09 +0100 |
---|---|---|
committer | Jon Medhurst <tixy@linaro.org> | 2015-06-17 18:05:16 +0100 |
commit | 19e0040168039760bc75e76e82e78b37daa6c1c1 (patch) | |
tree | a962c80771395f3f0f7010e334ad4a7ec568c472 | |
parent | 3ba502707bb7906826e2283b4071b3a34f0c1cbf (diff) |
arm64: Juno: Comment out the secondary HDLCD controller
The HDLCD controllers on Juno share the same PLL for the pixel
clock output. If the secondary output is not connected to a
monitor with the same resolution as the primary output, or
to a monitor with VGA resolution, it will cause the pixel
clock to be set to the wrong value for the primary output.
Comment out the secondary HDLCD controller for now.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
-rw-r--r-- | arch/arm64/boot/dts/arm/juno-base.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index bec952ddf54..ed93b2b28f4 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -94,7 +94,7 @@ clocks = <&soc_faxiclk>; clock-names = "apb_pclk"; }; - +/* hdlcd@7ff50000 { compatible = "arm,hdlcd"; reg = <0 0x7ff50000 0 0x1000>; @@ -108,7 +108,7 @@ }; }; }; - +*/ hdlcd@7ff60000 { compatible = "arm,hdlcd"; reg = <0 0x7ff60000 0 0x1000>; @@ -159,10 +159,10 @@ compatible = "nxp,tda998x"; reg = <0x71>; port { - tda998x_1_input: endpoint@0 { +/* tda998x_1_input: endpoint@0 { remote-endpoint = <&hdlcd1_output>; }; - +*/ tda998x_1_output: endpoint@1 { remote-endpoint = <&hdmi1_connector_output>; }; |