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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-07 17:31:00 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-07 17:31:23 +0100 |
| commit | 3af0522100dc8cb50f3bf3d9b6c22dd590b53eee (patch) | |
| tree | 40e50f433cf2d56c6f8b1af1ca034c9326b791a1 | |
| parent | ffed808d3617a159cb44e7870b4d5a630c690d9b (diff) | |
target/arm: Implement MVE VABS
Implement the MVE VABS functions (both integer and floating point).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/helper-mve.h | 6 | ||||
| -rw-r--r-- | target/arm/mve.decode | 3 | ||||
| -rw-r--r-- | target/arm/mve_helper.c | 10 | ||||
| -rw-r--r-- | target/arm/translate-mve.c | 15 |
4 files changed, 34 insertions, 0 deletions
diff --git a/target/arm/helper-mve.h b/target/arm/helper-mve.h index f1dc52f7a5..76508d5dd7 100644 --- a/target/arm/helper-mve.h +++ b/target/arm/helper-mve.h @@ -49,3 +49,9 @@ DEF_HELPER_FLAGS_3(mve_vrev64h, TCG_CALL_NO_WG, void, env, ptr, ptr) DEF_HELPER_FLAGS_3(mve_vrev64w, TCG_CALL_NO_WG, void, env, ptr, ptr) DEF_HELPER_FLAGS_3(mve_vmvn, TCG_CALL_NO_WG, void, env, ptr, ptr) + +DEF_HELPER_FLAGS_3(mve_vabsb, TCG_CALL_NO_WG, void, env, ptr, ptr) +DEF_HELPER_FLAGS_3(mve_vabsh, TCG_CALL_NO_WG, void, env, ptr, ptr) +DEF_HELPER_FLAGS_3(mve_vabsw, TCG_CALL_NO_WG, void, env, ptr, ptr) +DEF_HELPER_FLAGS_3(mve_vfabsh, TCG_CALL_NO_WG, void, env, ptr, ptr) +DEF_HELPER_FLAGS_3(mve_vfabss, TCG_CALL_NO_WG, void, env, ptr, ptr) diff --git a/target/arm/mve.decode b/target/arm/mve.decode index ff8afb682f..66963dc184 100644 --- a/target/arm/mve.decode +++ b/target/arm/mve.decode @@ -77,3 +77,6 @@ VREV32 1111 1111 1 . 11 .. 00 ... 0 0000 11 . 0 ... 0 @1op VREV64 1111 1111 1 . 11 .. 00 ... 0 0000 01 . 0 ... 0 @1op VMVN 1111 1111 1 . 11 00 00 ... 0 0101 11 . 0 ... 0 @1op_nosz + +VABS 1111 1111 1 . 11 .. 01 ... 0 0011 01 . 0 ... 0 @1op +VABS_fp 1111 1111 1 . 11 .. 01 ... 0 0111 01 . 0 ... 0 @1op diff --git a/target/arm/mve_helper.c b/target/arm/mve_helper.c index 2aacc73316..2ab05e66df 100644 --- a/target/arm/mve_helper.c +++ b/target/arm/mve_helper.c @@ -268,3 +268,13 @@ DO_1OP(vrev64w, 8, uint64_t, , wswap64) #define DO_NOT(N) (~(N)) DO_1OP(vmvn, 1, uint8_t, H1, DO_NOT) + +#define DO_ABS(N) ((N) < 0 ? -(N) : (N)) +#define DO_FABS(N) (N & ((__typeof(N))-1 >> 1)) + +DO_1OP(vabsb, 1, int8_t, H1, DO_ABS) +DO_1OP(vabsh, 2, int16_t, H2, DO_ABS) +DO_1OP(vabsw, 4, int32_t, H4, DO_ABS) + +DO_1OP(vfabsh, 2, uint16_t, H2, DO_FABS) +DO_1OP(vfabss, 4, uint32_t, H4, DO_FABS) diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index 6e5c3df717..badd4da2cb 100644 --- a/target/arm/translate-mve.c +++ b/target/arm/translate-mve.c @@ -211,6 +211,7 @@ static bool do_1op(DisasContext *s, arg_1op *a, MVEGenOneOpFn fn) DO_1OP(VCLZ, vclz) DO_1OP(VCLS, vcls) +DO_1OP(VABS, vabs) static bool trans_VREV16(DisasContext *s, arg_1op *a) { @@ -249,3 +250,17 @@ static bool trans_VMVN(DisasContext *s, arg_1op *a) { return do_1op(s, a, gen_helper_mve_vmvn); } + +static bool trans_VABS_fp(DisasContext *s, arg_1op *a) +{ + MVEGenOneOpFn *fns[] = { + NULL, + gen_helper_mve_vfabsh, + gen_helper_mve_vfabss, + NULL, + }; + if (!dc_isar_feature(aa32_mve_fp, s)) { + return false; + } + return do_1op(s, a, fns[a->size]); +} |