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authorNicolas Pitre <nicolas.pitre@linaro.org>2017-09-17 23:45:12 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2017-09-19 17:28:57 -0400
commit598cd1731c81236c157cc0282690de637d21dfcf (patch)
tree226dbb3c13261267f5607e717026933f0bfe982a
parent07e9febcfb1c51664cc04eefee1d2213b221e547 (diff)
downloadlinux-598cd1731c81236c157cc0282690de637d21dfcf.tar.gz
ARM: semihosting: use proper instruction on v7m processors
The svc instruction doesn't exist on v7m processors. Semihosting ops are invoked with the bkpt instruction instead. Signed-off-by: Nicolas Pitre <nico@linaro.org>
-rw-r--r--arch/arm/boot/compressed/debug.S4
-rw-r--r--arch/arm/kernel/debug.S8
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S
index 5392ee6..8f6e371 100644
--- a/arch/arm/boot/compressed/debug.S
+++ b/arch/arm/boot/compressed/debug.S
@@ -23,7 +23,11 @@ ENTRY(putc)
strb r0, [r1]
mov r0, #0x03 @ SYS_WRITEC
ARM( svc #0x123456 )
+#ifdef CONFIG_CPU_V7M
+ THUMB( bkpt #0xab )
+#else
THUMB( svc #0xab )
+#endif
mov pc, lr
.align 2
1: .word _GLOBAL_OFFSET_TABLE_ - .
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index 423f443..35145b6 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -121,7 +121,11 @@ ENTRY(printascii)
mov r1, r0
mov r0, #0x04 @ SYS_WRITE0
ARM( svc #0x123456 )
+#ifdef CONFIG_CPU_V7M
+ THUMB( bkpt #0xab )
+#else
THUMB( svc #0xab )
+#endif
ret lr
ENDPROC(printascii)
@@ -132,7 +136,11 @@ ENTRY(printch)
strb r0, [r1]
mov r0, #0x03 @ SYS_WRITEC
ARM( svc #0x123456 )
+#ifdef CONFIG_CPU_V7M
+ THUMB( bkpt #0xab )
+#else
THUMB( svc #0xab )
+#endif
ret lr
ENDPROC(printch)