clockevents: mips: migrate to ->set_dev_mode()

Clockevents core now supports ->set_dev_mode() (as a replacement to
->set_mode()), with capability to return error codes.

Migrate all MIPS specific clockevent drivers to implement this new callback.

Drivers now return -ENOSYS when a unsupported mode is passed to their
->set_dev_mode() callbacks and return 0 on success.

Most of the changes are automated with help of Coccinelle
(http://coccinelle.lip6.fr/) and the ones left are around the switch block which
are handled manually.

Some drivers had a WARN()/BUG()/pr_err()/empty-implementation for unsupported
modes. These statements and unsupported modes are removed now as proper error
handling with a WARN_ON() is done at clockevents core.

A simplified version of the semantic patch is:

@@
identifier m,c,setmode;
@@
-void
+int
setmode(enum clock_event_mode m, struct clock_event_device *c);

@@
identifier setmode;
@@
-void
+int
setmode(enum clock_event_mode, struct clock_event_device *);

@fixret@
identifier m,c,setmode;
@@
-void
+int
setmode(enum clock_event_mode m, struct clock_event_device *c)
 {
 ...
+ return 0;
 }

@depends on fixret@
identifier ced;
identifier fixret.setmode;
@@
... struct clock_event_device ced = {
...,
-.set_mode
+.set_dev_mode
= setmode,
};

@depends on fixret@
expression ced;
identifier fixret.setmode;
@@
- ced->set_mode
+ ced->set_dev_mode
= setmode

@depends on fixret@
identifier fixret.setmode;
@@
{
.
-set_mode
+set_dev_mode
= setmode
}

@depends on fixret@
expression ced;
identifier fixret.setmode;
@@
- ced.set_mode
+ ced.set_dev_mode
= setmode

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[
Backported from viresh branch tick/oneshot-stopped.
Applied below files manually
 - arch/mips/kernel/cevt-r4k.c
 - arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
]
Signed-off-by: Santosh Shukla <santosh.shukla@linaro.org>

15 files changed, 122 insertions, 36 deletions

diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 93fa586d52e2..4af4ed21d71b 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -70,9 +70,19 @@ static int au1x_rtcmatch2_set_next_event(unsigned long delta,
 	return 0;
 }
 
-static void au1x_rtcmatch2_set_mode(enum clock_event_mode mode,
+static int au1x_rtcmatch2_set_mode(enum clock_event_mode mode,
 				    struct clock_event_device *cd)
 {
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+		break;
+	default:
+		return -ENOSYS;
+	}
+	return 0;
 }
 
 static irqreturn_t au1x_rtcmatch2_irq(int irq, void *dev_id)
@@ -87,7 +97,7 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = {
 	.features	= CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 1500,
 	.set_next_event = au1x_rtcmatch2_set_next_event,
-	.set_mode	= au1x_rtcmatch2_set_mode,
+	.set_dev_mode	= au1x_rtcmatch2_set_mode,
 	.cpumask	= cpu_all_mask,
 };
 
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h
index 65f9bdd02f1f..e4872df6aee5 100644
--- a/arch/mips/include/asm/cevt-r4k.h
+++ b/arch/mips/include/asm/cevt-r4k.h
@@ -21,7 +21,7 @@ DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
 
 void mips_event_handler(struct clock_event_device *dev);
 int c0_compare_int_usable(void);
-void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);
+int mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);
 irqreturn_t c0_compare_interrupt(int, void *);
 
 extern struct irqaction c0_compare_irqaction;
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index e1ea4f625f7a..1ceee92813bc 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -110,10 +110,20 @@ asmlinkage void plat_irq_dispatch(void)
 	}
 }
 
-static void r4030_set_mode(enum clock_event_mode mode,
+static int r4030_set_mode(enum clock_event_mode mode,
 			   struct clock_event_device *evt)
 {
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
 	/* Nothing to do ...  */
+		break;
+	default:
+		return -ENOSYS;
+	}
+	return 0;
 }
 
 struct clock_event_device r4030_clockevent = {
@@ -121,7 +131,7 @@ struct clock_event_device r4030_clockevent = {
 	.features	= CLOCK_EVT_FEAT_PERIODIC,
 	.rating		= 300,
 	.irq		= JAZZ_TIMER_IRQ,
-	.set_mode	= r4030_set_mode,
+	.set_dev_mode	= r4030_set_mode,
 };
 
 static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
index 5e430ce9ac7e..2eb3fe1db14a 100644
--- a/arch/mips/jz4740/time.c
+++ b/arch/mips/jz4740/time.c
@@ -57,7 +57,7 @@ static irqreturn_t jz4740_clockevent_irq(int irq, void *devid)
 	return IRQ_HANDLED;
 }
 
-static void jz4740_clockevent_set_mode(enum clock_event_mode mode,
+static int jz4740_clockevent_set_mode(enum clock_event_mode mode,
 	struct clock_event_device *cd)
 {
 	switch (mode) {
@@ -72,9 +72,12 @@ static void jz4740_clockevent_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_SHUTDOWN:
 		jz4740_timer_disable(TIMER_CLOCKEVENT);
 		break;
-	default:
+	case CLOCK_EVT_MODE_UNUSED:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static int jz4740_clockevent_set_next(unsigned long evt,
@@ -91,7 +94,7 @@ static struct clock_event_device jz4740_clockevent = {
 	.name = "jz4740-timer",
 	.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.set_next_event = jz4740_clockevent_set_next,
-	.set_mode = jz4740_clockevent_set_mode,
+	.set_dev_mode = jz4740_clockevent_set_mode,
 	.rating = 200,
 	.irq = JZ4740_IRQ_TCU0,
 };
diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c
index 7976457184b1..0dadec4712e2 100644
--- a/arch/mips/kernel/cevt-bcm1480.c
+++ b/arch/mips/kernel/cevt-bcm1480.c
@@ -40,7 +40,7 @@
  * The general purpose timer ticks at 1MHz independent if
  * the rest of the system
  */
-static void sibyte_set_mode(enum clock_event_mode mode,
+static int sibyte_set_mode(enum clock_event_mode mode,
 			   struct clock_event_device *evt)
 {
 	unsigned int cpu = smp_processor_id();
@@ -65,8 +65,11 @@ static void sibyte_set_mode(enum clock_event_mode mode,
 
 	case CLOCK_EVT_MODE_UNUSED:	/* shuddup gcc */
 	case CLOCK_EVT_MODE_RESUME:
-		;
+		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
@@ -130,7 +133,7 @@ void sb1480_clockevent_init(void)
 	cd->irq			= irq;
 	cd->cpumask		= cpumask_of(cpu);
 	cd->set_next_event	= sibyte_next_event;
-	cd->set_mode		= sibyte_set_mode;
+	cd->set_dev_mode	= sibyte_set_mode;
 	clockevents_register_device(cd);
 
 	bcm1480_mask_irq(cpu, irq);
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c
index ff1f01b72270..db58c38dd1b8 100644
--- a/arch/mips/kernel/cevt-ds1287.c
+++ b/arch/mips/kernel/cevt-ds1287.c
@@ -59,10 +59,11 @@ static int ds1287_set_next_event(unsigned long delta,
 	return -EINVAL;
 }
 
-static void ds1287_set_mode(enum clock_event_mode mode,
+static int ds1287_set_mode(enum clock_event_mode mode,
 			    struct clock_event_device *evt)
 {
 	u8 val;
+	int ret = 0;
 
 	spin_lock(&rtc_lock);
 
@@ -73,6 +74,10 @@ static void ds1287_set_mode(enum clock_event_mode mode,
 		val |= RTC_PIE;
 		break;
 	default:
+		ret = -ENOSYS;
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
 		val &= ~RTC_PIE;
 		break;
 	}
@@ -80,6 +85,7 @@ static void ds1287_set_mode(enum clock_event_mode mode,
 	CMOS_WRITE(val, RTC_REG_B);
 
 	spin_unlock(&rtc_lock);
+	return ret;
 }
 
 static void ds1287_event_handler(struct clock_event_device *dev)
@@ -90,7 +96,7 @@ static struct clock_event_device ds1287_clockevent = {
 	.name		= "ds1287",
 	.features	= CLOCK_EVT_FEAT_PERIODIC,
 	.set_next_event = ds1287_set_next_event,
-	.set_mode	= ds1287_set_mode,
+	.set_dev_mode	= ds1287_set_mode,
 	.event_handler	= ds1287_event_handler,
 };
 
diff --git a/arch/mips/kernel/cevt-gic.c b/arch/mips/kernel/cevt-gic.c
index 594cbbf16d62..ae4b1eefdce6 100644
--- a/arch/mips/kernel/cevt-gic.c
+++ b/arch/mips/kernel/cevt-gic.c
@@ -31,10 +31,20 @@ static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
 	return res;
 }
 
-void gic_set_clock_mode(enum clock_event_mode mode,
+int gic_set_clock_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
 	/* Nothing to do ...  */
+		break;
+	default:
+		return -ENOSYS;
+	}
+	return 0;
 }
 
 irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
@@ -85,7 +95,7 @@ int gic_clockevent_init(void)
 	cd->irq			= irq;
 	cd->cpumask		= cpumask_of(cpu);
 	cd->set_next_event	= gic_next_event;
-	cd->set_mode		= gic_set_clock_mode;
+	cd->set_dev_mode	= gic_set_clock_mode;
 	cd->event_handler	= gic_event_handler;
 
 	clockevents_register_device(cd);
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index f069460751ab..664c007c5006 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -64,10 +64,11 @@ static int gt641xx_timer0_set_next_event(unsigned long delta,
 	return 0;
 }
 
-static void gt641xx_timer0_set_mode(enum clock_event_mode mode,
+static int gt641xx_timer0_set_mode(enum clock_event_mode mode,
 				    struct clock_event_device *evt)
 {
 	u32 ctrl;
+	int ret = 0;
 
 	raw_spin_lock(&gt641xx_timer_lock);
 
@@ -81,13 +82,18 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_ONESHOT:
 		ctrl |= GT_TC_CONTROL_ENTC0_MSK;
 		break;
-	default:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		ret = -ENOSYS;
 	}
 
 	GT_WRITE(GT_TC_CONTROL_OFS, ctrl);
 
 	raw_spin_unlock(&gt641xx_timer_lock);
+	return ret;
 }
 
 static void gt641xx_timer0_event_handler(struct clock_event_device *dev)
@@ -99,7 +105,7 @@ static struct clock_event_device gt641xx_timer0_clockevent = {
 	.features	= CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.irq		= GT641XX_TIMER0_IRQ,
 	.set_next_event = gt641xx_timer0_set_next_event,
-	.set_mode	= gt641xx_timer0_set_mode,
+	.set_dev_mode	= gt641xx_timer0_set_mode,
 	.event_handler	= gt641xx_timer0_event_handler,
 };
 
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 50d3f5a8d6bb..00952e1a764d 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -38,10 +38,20 @@ static int mips_next_event(unsigned long delta,
 
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-void mips_set_clock_mode(enum clock_event_mode mode,
+int mips_set_clock_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
-	/* Nothing to do ...  */
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
+        /* Nothing to do ...  */
+		break;
+	default:
+		return -ENOSYS;
+	}
+	return 0;
 }
 
 DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
@@ -207,7 +217,7 @@ int r4k_clockevent_init(void)
 	cd->irq			= irq;
 	cd->cpumask		= cpumask_of(cpu);
 	cd->set_next_event	= mips_next_event;
-	cd->set_mode		= mips_set_clock_mode;
+	cd->set_dev_mode	= mips_set_clock_mode;
 	cd->event_handler	= mips_event_handler;
 
 #ifdef CONFIG_CEVT_GIC
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c
index 5ea6d6b1de15..d33b3b998bf9 100644
--- a/arch/mips/kernel/cevt-sb1250.c
+++ b/arch/mips/kernel/cevt-sb1250.c
@@ -38,7 +38,7 @@
  * The general purpose timer ticks at 1MHz independent if
  * the rest of the system
  */
-static void sibyte_set_mode(enum clock_event_mode mode,
+static int sibyte_set_mode(enum clock_event_mode mode,
 			   struct clock_event_device *evt)
 {
 	unsigned int cpu = smp_processor_id();
@@ -63,8 +63,11 @@ static void sibyte_set_mode(enum clock_event_mode mode,
 
 	case CLOCK_EVT_MODE_UNUSED:	/* shuddup gcc */
 	case CLOCK_EVT_MODE_RESUME:
-		;
+		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
@@ -129,7 +132,7 @@ void sb1250_clockevent_init(void)
 	cd->irq			= irq;
 	cd->cpumask		= cpumask_of(cpu);
 	cd->set_next_event	= sibyte_next_event;
-	cd->set_mode		= sibyte_set_mode;
+	cd->set_dev_mode	= sibyte_set_mode;
 	clockevents_register_device(cd);
 
 	sb1250_mask_irq(cpu, irq);
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index 2ae08462e46e..05bd5cea03d6 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -76,7 +76,7 @@ static void txx9tmr_stop_and_clear(struct txx9_tmr_reg __iomem *tmrptr)
 	__raw_writel(0, &tmrptr->tisr);
 }
 
-static void txx9tmr_set_mode(enum clock_event_mode mode,
+static int txx9tmr_set_mode(enum clock_event_mode mode,
 			     struct clock_event_device *evt)
 {
 	struct txx9_clock_event_device *txx9_cd =
@@ -105,7 +105,10 @@ static void txx9tmr_set_mode(enum clock_event_mode mode,
 		__raw_writel(TIMER_CCD, &tmrptr->ccdr);
 		__raw_writel(0, &tmrptr->itmr);
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static int txx9tmr_set_next_event(unsigned long delta,
@@ -128,7 +131,7 @@ static struct txx9_clock_event_device txx9_clock_event_device = {
 		.features	= CLOCK_EVT_FEAT_PERIODIC |
 				  CLOCK_EVT_FEAT_ONESHOT,
 		.rating		= 200,
-		.set_mode	= txx9tmr_set_mode,
+		.set_dev_mode	= txx9tmr_set_mode,
 		.set_next_event = txx9tmr_set_next_event,
 	},
 };
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
index c639b9db0012..9f7b474c556d 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
@@ -52,9 +52,11 @@ void enable_mfgpt0_counter(void)
 }
 EXPORT_SYMBOL(enable_mfgpt0_counter);
 
-static void init_mfgpt_timer(enum clock_event_mode mode,
+static int init_mfgpt_timer(enum clock_event_mode mode,
 			     struct clock_event_device *evt)
 {
+	int ret = 0;
+
 	spin_lock(&mfgpt_lock);
 
 	switch (mode) {
@@ -78,14 +80,17 @@ static void init_mfgpt_timer(enum clock_event_mode mode,
 	case CLOCK_EVT_MODE_RESUME:
 		/* Nothing to do here */
 		break;
+	default:
+		ret = -ENOSYS;
 	}
 	spin_unlock(&mfgpt_lock);
+	return ret;
 }
 
 static struct clock_event_device mfgpt_clockevent = {
 	.name = "mfgpt",
 	.features = CLOCK_EVT_FEAT_PERIODIC,
-	.set_mode = init_mfgpt_timer,
+	.set_dev_mode = init_mfgpt_timer,
 	.irq = CS5536_MFGPT_INTR,
 };
 
diff --git a/arch/mips/ralink/cevt-rt3352.c b/arch/mips/ralink/cevt-rt3352.c
index 24bf057a3613..18128f7c96e9 100644
--- a/arch/mips/ralink/cevt-rt3352.c
+++ b/arch/mips/ralink/cevt-rt3352.c
@@ -36,7 +36,7 @@ struct systick_device {
 	int freq_scale;
 };
 
-static void systick_set_clock_mode(enum clock_event_mode mode,
+static int systick_set_clock_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt);
 
 static int systick_next_event(unsigned long delta,
@@ -76,7 +76,7 @@ static struct systick_device systick = {
 		.rating		= 310,
 		.features	= CLOCK_EVT_FEAT_ONESHOT,
 		.set_next_event	= systick_next_event,
-		.set_mode	= systick_set_clock_mode,
+		.set_dev_mode	= systick_set_clock_mode,
 		.event_handler	= systick_event_handler,
 	},
 };
@@ -87,7 +87,7 @@ static struct irqaction systick_irqaction = {
 	.dev_id = &systick.dev,
 };
 
-static void systick_set_clock_mode(enum clock_event_mode mode,
+static int systick_set_clock_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
 	struct systick_device *sdev;
@@ -110,10 +110,14 @@ static void systick_set_clock_mode(enum clock_event_mode mode,
 		iowrite32(0, systick.membase + SYSTICK_CONFIG);
 		break;
 
-	default:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_RESUME:
 		pr_err("%s: Unhandeled mips clock_mode\n", systick.dev.name);
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static void __init ralink_systick_init(struct device_node *np)
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 1d97eaba0c5f..5d5e90c5d839 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -63,10 +63,20 @@ static int rt_next_event(unsigned long delta, struct clock_event_device *evt)
 	return LOCAL_HUB_L(PI_RT_COUNT) >= cnt ? -ETIME : 0;
 }
 
-static void rt_set_mode(enum clock_event_mode mode,
+static int rt_set_mode(enum clock_event_mode mode,
 		struct clock_event_device *evt)
 {
+	switch (mode) {
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+	case CLOCK_EVT_MODE_RESUME:
 	/* Nothing to do ...  */
+		break;
+	default:
+		return -ENOSYS;
+	}
+	return 0;
 }
 
 unsigned int rt_timer_irq;
@@ -123,7 +133,7 @@ void hub_rt_clock_event_init(void)
 	cd->irq			= irq;
 	cd->cpumask		= cpumask_of(cpu);
 	cd->set_next_event	= rt_next_event;
-	cd->set_mode		= rt_set_mode;
+	cd->set_dev_mode	= rt_set_mode;
 	clockevents_register_device(cd);
 }
 
diff --git a/arch/mips/sni/time.c b/arch/mips/sni/time.c
index cf8ec568b9df..d68720c16722 100644
--- a/arch/mips/sni/time.c
+++ b/arch/mips/sni/time.c
@@ -14,7 +14,7 @@
 #define SNI_COUNTER2_DIV	64
 #define SNI_COUNTER0_DIV	((SNI_CLOCK_TICK_RATE / SNI_COUNTER2_DIV) / HZ)
 
-static void a20r_set_mode(enum clock_event_mode mode,
+static int a20r_set_mode(enum clock_event_mode mode,
 			  struct clock_event_device *evt)
 {
 	switch (mode) {
@@ -40,7 +40,10 @@ static void a20r_set_mode(enum clock_event_mode mode,
 		break;
 	case CLOCK_EVT_MODE_RESUME:
 		break;
+	default:
+		return -ENOSYS;
 	}
+	return 0;
 }
 
 static struct clock_event_device a20r_clockevent_device = {
@@ -51,7 +54,7 @@ static struct clock_event_device a20r_clockevent_device = {
 
 	.rating		= 300,
 	.irq		= SNI_A20R_IRQ_TIMER,
-	.set_mode	= a20r_set_mode,
+	.set_dev_mode	= a20r_set_mode,
 };
 
 static irqreturn_t a20r_interrupt(int irq, void *dev_id)