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| author | Daniel Thompson <daniel.thompson@linaro.org> | 2020-02-13 10:17:27 +0000 |
|---|---|---|
| committer | Daniel Thompson <daniel.thompson@linaro.org> | 2020-08-12 16:56:20 +0100 |
| commit | 0340ad937232557c2f01ac963bb6dc98632c2960 (patch) | |
| tree | 2ae65fefbbf2ca28aa52913fbccbd31965b90e63 | |
| parent | bcf876870b95592b52519ed4aafcf9d95999bc9c (diff) | |
NOUPSTREAM: Force C-A72 workarounds to deploy on C-A53
Currently we work around a bootloader bug on Pinebook Pro by disabling
the A72 cores at boot. This has a nasty side effect, which is that the
A72 errata logic doesn't deploy and the errata system refuses to allow
the A72 cores to come online.
Workaround this with simply brute force (hence the NOUPSTREAM).
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
| -rw-r--r-- | arch/arm64/kernel/cpu_errata.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 79728bfb5351..c8c6cd16876b 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -635,6 +635,7 @@ has_neoverse_n1_erratum_1542419(const struct arm64_cpu_capabilities *entry, #if defined(CONFIG_HARDEN_EL2_VECTORS) static const struct midr_range ca57_a72[] = { + MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), MIDR_ALL_VERSIONS(MIDR_CORTEX_A72), {}, |