diff options
author | Tushar Behera <tushar.behera@linaro.org> | 2013-08-29 14:44:04 +0530 |
---|---|---|
committer | Tushar Behera <tushar.behera@linaro.org> | 2014-02-21 15:48:02 +0530 |
commit | f5f19e7a0c6b8b309fbd4f83c612ba3903f43269 (patch) | |
tree | 3537477eeaf4d8ae5591bfa95a18740aaa17ddb8 | |
parent | 39412f6f38ad742440e219c718fab224a2105598 (diff) |
media: s5p-tv: Add HDMI-audio support
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
-rw-r--r-- | drivers/media/platform/s5p-tv/hdmi_drv.c | 167 | ||||
-rw-r--r-- | drivers/media/platform/s5p-tv/regs-hdmi.h | 4 |
2 files changed, 169 insertions, 2 deletions
diff --git a/drivers/media/platform/s5p-tv/hdmi_drv.c b/drivers/media/platform/s5p-tv/hdmi_drv.c index 015774373b7..4a9f48bd4f8 100644 --- a/drivers/media/platform/s5p-tv/hdmi_drv.c +++ b/drivers/media/platform/s5p-tv/hdmi_drv.c @@ -201,14 +201,175 @@ static irqreturn_t hdmi_irq_handler(int irq, void *dev_data) return IRQ_HANDLED; } +/* Audio related changes */ +static void hdmi_set_acr(u32 freq, u8 *acr) +{ + u32 n, cts; + + switch (freq) { + case 32000: + n = 4096; + cts = 27000; + break; + case 44100: + n = 6272; + cts = 30000; + break; + case 88200: + n = 12544; + cts = 30000; + break; + case 176400: + n = 25088; + cts = 30000; + break; + case 48000: + n = 6144; + cts = 27000; + break; + case 96000: + n = 12288; + cts = 27000; + break; + case 192000: + n = 24576; + cts = 27000; + break; + default: + n = 0; + cts = 0; + break; + } + + acr[1] = cts >> 16; + acr[2] = cts >> 8 & 0xff; + acr[3] = cts & 0xff; + + acr[4] = n >> 16; + acr[5] = n >> 8 & 0xff; + acr[6] = n & 0xff; +} + +static void hdmi_reg_acr(struct hdmi_device *hdev, u8 *acr) +{ + hdmi_writeb(hdev, HDMI_ACR_N0, acr[6]); + hdmi_writeb(hdev, HDMI_ACR_N1, acr[5]); + hdmi_writeb(hdev, HDMI_ACR_N2, acr[4]); + hdmi_writeb(hdev, HDMI_ACR_MCTS0, acr[3]); + hdmi_writeb(hdev, HDMI_ACR_MCTS1, acr[2]); + hdmi_writeb(hdev, HDMI_ACR_MCTS2, acr[1]); + hdmi_writeb(hdev, HDMI_ACR_CTS0, acr[3]); + hdmi_writeb(hdev, HDMI_ACR_CTS1, acr[2]); + hdmi_writeb(hdev, HDMI_ACR_CTS2, acr[1]); + + hdmi_writeb(hdev, HDMI_ACR_CON, 4); +} + +static void hdmi_audio_init(struct hdmi_device *hdev) +{ + u32 sample_rate, bits_per_sample, frame_size_code; + u32 data_num, bit_ch, sample_frq; + u32 val; + u8 acr[7]; + + sample_rate = 44100; + bits_per_sample = 16; + frame_size_code = 0; + + switch (bits_per_sample) { + case 20: + data_num = 2; + bit_ch = 1; + break; + case 24: + data_num = 3; + bit_ch = 1; + break; + default: + data_num = 1; + bit_ch = 0; + break; + } + + hdmi_set_acr(sample_rate, acr); + hdmi_reg_acr(hdev, acr); + + hdmi_writeb(hdev, HDMI_I2S_MUX_CON, HDMI_I2S_IN_DISABLE + | HDMI_I2S_AUD_I2S | HDMI_I2S_CUV_I2S_ENABLE + | HDMI_I2S_MUX_ENABLE); + + hdmi_writeb(hdev, HDMI_I2S_MUX_CH, HDMI_I2S_CH0_EN + | HDMI_I2S_CH1_EN | HDMI_I2S_CH2_EN); + + hdmi_writeb(hdev, HDMI_I2S_MUX_CUV, HDMI_I2S_CUV_RL_EN); + + sample_frq = (sample_rate == 44100) ? 0 : + (sample_rate == 48000) ? 2 : + (sample_rate == 32000) ? 3 : + (sample_rate == 96000) ? 0xa : 0x0; + + hdmi_writeb(hdev, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_DIS); + hdmi_writeb(hdev, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_EN); + + val = hdmi_read(hdev, HDMI_I2S_DSD_CON) | 0x01; + hdmi_writeb(hdev, HDMI_I2S_DSD_CON, val); + + /* Configuration I2S input ports. Configure I2S_PIN_SEL_0~4 */ + hdmi_writeb(hdev, HDMI_I2S_PIN_SEL_0, HDMI_I2S_SEL_SCLK(5) + | HDMI_I2S_SEL_LRCK(6)); + hdmi_writeb(hdev, HDMI_I2S_PIN_SEL_1, HDMI_I2S_SEL_SDATA1(3) + | HDMI_I2S_SEL_SDATA2(4)); + hdmi_writeb(hdev, HDMI_I2S_PIN_SEL_2, HDMI_I2S_SEL_SDATA3(1) + | HDMI_I2S_SEL_SDATA2(2)); + hdmi_writeb(hdev, HDMI_I2S_PIN_SEL_3, HDMI_I2S_SEL_DSD(0)); + + /* I2S_CON_1 & 2 */ + hdmi_writeb(hdev, HDMI_I2S_CON_1, HDMI_I2S_SCLK_FALLING_EDGE + | HDMI_I2S_L_CH_LOW_POL); + hdmi_writeb(hdev, HDMI_I2S_CON_2, HDMI_I2S_MSB_FIRST_MODE + | HDMI_I2S_SET_BIT_CH(bit_ch) + | HDMI_I2S_SET_SDATA_BIT(data_num) + | HDMI_I2S_BASIC_FORMAT); + + /* Configure register related to CUV information */ + hdmi_writeb(hdev, HDMI_I2S_CH_ST_0, HDMI_I2S_CH_STATUS_MODE_0 + | HDMI_I2S_2AUD_CH_WITHOUT_PREEMPH + | HDMI_I2S_COPYRIGHT + | HDMI_I2S_LINEAR_PCM + | HDMI_I2S_CONSUMER_FORMAT); + hdmi_writeb(hdev, HDMI_I2S_CH_ST_1, HDMI_I2S_CD_PLAYER); + hdmi_writeb(hdev, HDMI_I2S_CH_ST_2, HDMI_I2S_SET_SOURCE_NUM(0)); + hdmi_writeb(hdev, HDMI_I2S_CH_ST_3, HDMI_I2S_CLK_ACCUR_LEVEL_2 + | HDMI_I2S_SET_SMP_FREQ(sample_frq)); + hdmi_writeb(hdev, HDMI_I2S_CH_ST_4, + HDMI_I2S_ORG_SMP_FREQ_44_1 + | HDMI_I2S_WORD_LEN_MAX24_24BITS + | HDMI_I2S_WORD_LEN_MAX_24BITS); + + hdmi_writeb(hdev, HDMI_I2S_CH_ST_CON, HDMI_I2S_CH_STATUS_RELOAD); +} + +static void hdmi_audio_control(struct hdmi_device *hdev, bool onoff) +{ + u32 mod; + + mod = hdmi_read(hdev, HDMI_MODE_SEL); + if (mod & HDMI_MODE_DVI_EN) + return; + + hdmi_writeb(hdev, HDMI_AUI_CON, onoff ? 2 : 0); + hdmi_write_mask(hdev, HDMI_CON_0, onoff ? + HDMI_ASP_EN : HDMI_ASP_DIS, HDMI_ASP_MASK); +} + static void hdmi_reg_init(struct hdmi_device *hdev) { /* enable HPD interrupts */ hdmi_write_mask(hdev, HDMI_INTC_CON, ~0, HDMI_INTC_EN_GLOBAL | HDMI_INTC_EN_HPD_PLUG | HDMI_INTC_EN_HPD_UNPLUG); - /* choose DVI mode */ + /* choose HDMI mode */ hdmi_write_mask(hdev, HDMI_MODE_SEL, - HDMI_MODE_DVI_EN, HDMI_MODE_MASK); + HDMI_MODE_HDMI_EN, HDMI_MODE_MASK); hdmi_write_mask(hdev, HDMI_CON_2, ~0, HDMI_DVI_PERAMBLE_EN | HDMI_DVI_BAND_EN); /* disable bluescreen */ @@ -601,10 +762,12 @@ static int hdmi_conf_apply(struct hdmi_device *hdmi_dev) mdelay(10); hdmi_reg_init(hdmi_dev); + hdmi_audio_init(hdmi_dev); /* setting core registers */ //hdmi_timing_apply(hdmi_dev, conf); hdmi_v14_timing_apply(hdmi_dev, conf); + hdmi_audio_control(hdmi_dev, true); hdmi_dev->cur_conf_dirty = 0; diff --git a/drivers/media/platform/s5p-tv/regs-hdmi.h b/drivers/media/platform/s5p-tv/regs-hdmi.h index 5b8b68e2471..d7135bd459f 100644 --- a/drivers/media/platform/s5p-tv/regs-hdmi.h +++ b/drivers/media/platform/s5p-tv/regs-hdmi.h @@ -20,6 +20,7 @@ /* HDMI Version 1.3 & Common */ #define HDMI_CTRL_BASE(x) ((x) + 0x00000000) #define HDMI_CORE_BASE(x) ((x) + 0x00010000) +#define HDMI_I2S_BASE(x) ((x) + 0x00040000) #define HDMI_TG_BASE(x) ((x) + 0x00050000) /* Control registers */ @@ -130,6 +131,9 @@ /* HDMI_CON_0 */ #define HDMI_BLUE_SCR_EN (1 << 5) +#define HDMI_ASP_EN (1 << 2) +#define HDMI_ASP_DIS (0 << 2) +#define HDMI_ASP_MASK (1 << 2) #define HDMI_EN (1 << 0) /* HDMI_CON_2 */ |