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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2019-08-15 13:38:25 +0100
committerSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2020-02-28 11:21:34 +0000
commit16814aa78f3dac1ed56137564e65bbea1b1b67fb (patch)
treea727b0cf0798d77e3ec5fce2d4c41b75033bdd96
parentb52277f042d776455bda4648cac2d2c145dbfad4 (diff)
arm64: dts: db845c: add Low speed expansion i2c and spi nodestracking-qcomlt-sdm845-db845c
This patch adds support UART0, I2C0, I2C1 and SPI0 available on Low Speed expansion connector. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845-db845c.dts34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index 03d893237472..908c71922bbc 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -506,6 +506,24 @@
};
};
+&i2c11 {
+ /* On Low speed expansion */
+ label = "LS-I2C1";
+ status = "okay";
+};
+
+&i2c14 {
+ /* On Low speed expansion */
+ label = "LS-I2C0";
+ status = "okay";
+};
+
+&spi2 {
+ /* On Low speed expansion */
+ label = "LS-SPI0";
+ status = "okay";
+};
+
&mdss {
status = "okay";
};
@@ -746,6 +764,11 @@
};
};
+&uart3 {
+ label = "LS-UART0";
+ status = "disabled";
+};
+
&uart6 {
status = "okay";
@@ -761,6 +784,7 @@
};
&uart9 {
+ label = "LS-UART1";
status = "okay";
};
@@ -846,6 +870,16 @@
};
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
+&qup_spi2_default {
+ drive-strength = <16>;
+};
+
+&qup_uart3_default{
+ pinmux {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ function = "qup3";
+ };
+};
&qup_i2c10_default {
pinconf {