| Age | Commit message (Collapse) | Author |
|---|
|
integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
integration-linux-qcomlt
# Conflicts:
# drivers/phy/qualcomm/phy-qcom-qmp.c
|
|
into integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
'qcs404-defconfig/tracking-qcomlt-qcs404-defconfig' into integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
into integration-linux-qcomlt
# Conflicts:
# arch/arm64/boot/dts/qcom/sdm845-db845c.dts
|
|
integration-linux-qcomlt
# Conflicts:
# drivers/usb/host/xhci-pci.c
|
|
'distro.config/tracking-qcomlt-config-fragments' into integration-linux-qcomlt
|
|
'arm64-defconfig/tracking-qcomlt-arm64-defconfig' into integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
'fixes/tracking-qcomlt-fixes-without-devfreq-reverts' into integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
integration-linux-qcomlt
|
|
Add driver for the Qualcomm interconnect buses found in SC7180 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
The Qualcomm SC7180 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
|
|
Currently, there is a single lock, the icc_lock, that used for handling all
icc_set_bw() requests, including those for unrelated paths. This means that
some request are unnecessarily serialized, which may in turn have impact on
performance.
To address this issue, we are introducing a provider specific locks.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
The header file is not used. Drop it.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
Add a driver for stress testing the the Qualcomm SDM845 interconnect
driver. In includes running multiple threads in a loop that are setting
random bandwidth on different paths.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
Add a driver for stress testing the the Qualcomm MSM8916 interconnect
driver. In includes running multiple threads in a loop that are
setting random bandwidth on different paths.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
Enable the interconnect framework and the platform drivers for 64bit
Qualcomm platforms.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
Add nodes for the network-on-chip interconnect buses present on
MSM8916-based platforms.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
The frequency OPP tables have helper functions to search for entries in the
table based on frequency and get the frequency values for a given (or
suspend) OPP entry.
Add similar helper functions for bandwidth OPP tables to search for entries
in the table based on peak bandwidth and to get the peak and average
bandwidth for a given (or suspend) OPP entry.
Signed-off-by: Saravana Kannan <saravanak@google.com>
|
|
Not all devices quantify their performance points in terms of frequency.
Devices like interconnects quantify their performance points in terms of
bandwidth. We need a way to represent these bandwidth levels in OPP. So,
add support for parsing bandwidth OPPs from DT.
Signed-off-by: Saravana Kannan <saravanak@google.com>
|
|
Interconnects often quantify their performance points in terms of
bandwidth. So, add opp-peak-kBps (required) and opp-avg-kBps (optional) to
allow specifying Bandwidth OPP tables in DT.
opp-peak-kBps is a required property that replaces opp-hz for Bandwidth OPP
tables.
opp-avg-kBps is an optional property that can be used in Bandwidth OPP
tables.
Signed-off-by: Saravana Kannan <saravanak@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
|
|
Add Operating State Manager (OSM) L3 interconnect provider support on
SC7180 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
|
|
Add OSM L3 interconnect provider binding on SC7180 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
|
|
On some Qualcomm SoCs, Operating State Manager (OSM) controls the
resources of scaling L3 caches. Add a driver to handle bandwidth
requests to OSM L3 from CPU on SDM845 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
|
|
Add bindings for Operating State Manager (OSM) L3 interconnect provider
on SDM845 SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
|
|
In order to better represent the hardware and its different Network-On-Chip
devices, split the sdm845 provider driver into NoC specific providers.
Remove duplicate functionality already provided by the icc rpmh and
bcm voter drivers to calculate and commit bandwidth requests to hardware.
Signed-off-by: David Dai <daidavid1@codeaurora.org>
|
|
Add bcm voter driver and add support for RPMh specific interconnect providers
which implements the set and aggregate functionalities that translates
bandwidth requests into RPMh messages. These modules provide a common set of
functionalities for all Qualcomm RPMh based interconnect providers and
should help reduce code duplication when adding new providers.
Signed-off-by: David Dai <daidavid1@codeaurora.org>
|
|
Redefine the Network-on-Chip devices to more accurately describe
the interconnect topology on Qualcomm's SDM845 platform. Each
interconnect device can communicate with different instances of the
RPMh hardware which are described as RSCs(Resource State Coordinators).
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
|
|
Add YAML schemas for interconnect bcm-voters found on QCOM RPMh-based
SoCs.
Signed-off-by: David Dai <daidavid1@codeaurora.org>
|
|
Convert the qcom,sdm845 interconnect provider binding to DT schema.
Signed-off-by: David Dai <daidavid1@codeaurora.org>
|
|
run "echo 1 > /sys/kernel/debug/renesas-usb/rom_erase" to erase firmware
when driver is loaded.
Subsequent init of driver shall reload the firmware
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Allow multiple firmware file versions in table and load them in
increasing order as we find them in the file system.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: Christian Lamparter <chunkeey@googlemail.com>
|
|
uPD720201 supports ROM and allows software to program the ROM and boot
from it. Add support for detecting if ROM is present, if so load the ROM
if not programmed earlier.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: Christian Lamparter <chunkeey@googlemail.com>
|
|
This add a new driver for renesas xhci which is basically a firmware
loader for uPD720201 and uPD720202 w/o ROM. It uses xhci-pci driver for
most of the work.
This is added in Makefile before the xhci-pci driver so that it first
get probed for renesas devices before the xhci-pci driver has a chance
to claim any device.
This patch adds a firmware loader for the uPD720201K8-711-BAC-A
and uPD720202K8-711-BAA-A variant. Both of these chips are listed
in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as
devices which need the firmware loader on page 2 in order to
work as they "do not support the External ROM".
The "Firmware Download Sequence" is describe in chapter
"7.1 FW Download Interface" R19UH0078EJ0500 Rev.5.00 page 131.
The firmware "K2013080.mem" is available from a USB3.0 Host to
PCIe Adapter (PP2U-E card) "Firmware download" archive. An
alternative version can be sourced from Netgear's WNDR4700 GPL
archives.
The release notes of the PP2U-E's "Firmware Download" ver 2.0.1.3
(2012-06-15) state that the firmware is for the following devices:
- uPD720201 ES 2.0 sample whose revision ID is 2.
- uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3.
- uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2.
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[vkoul: fixed comments:
used macros for timeout count and delay
removed renesas_fw_alive_check
cleaned renesas_fw_callback
removed recurion for renesas_fw_download
added MODULE_FIRMWARE
add register defines and field names
move to a separate driver]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
Export the xhci_pci_setup(), xhci_pci_probe() xhci_pci_remove(),
xhci_pci_suspend() and xhci_pci_resume() functions as they would be used
by renesas-xhci driver.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
|
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Paul Walmsley:
"Two fixes for RISC-V:
- Clear FP registers during boot when FP support is present, rather
than when they aren't present
- Move the header files associated with the SiFive L2 cache
controller to drivers/soc (where the code was recently moved)"
* tag 'riscv/for-v5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Fixup obvious bug for fp-regs reset
riscv: move sifive_l2_cache.h to include/soc
|
|
CSR_MISA is defined in Privileged Architectures' spec: 3.1.1 Machine
ISA Register misa. Every bit:1 indicate a feature, so we should beqz
reset_done when there is no F/D bit in csr_misa register.
Signed-off-by: Guo Ren <ren_guo@c-sky.com>
[paul.walmsley@sifive.com: fix typo in commit message]
Fixes: 9e80635619b51 ("riscv: clear the instruction cache and all registers when booting")
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
|
|
The commit 9209fb51896f ("riscv: move sifive_l2_cache.c to drivers/soc")
moves the sifive L2 cache driver to driver/soc. It did not move the
header file along with the driver. Therefore this patch moves the header
file to driver/soc
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
[paul.walmsley@sifive.com: updated to fix the include guard]
Fixes: 9209fb51896f ("riscv: move sifive_l2_cache.c to drivers/soc")
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu fixes from Joerg Roedel:
- Two fixes for VT-d and generic IOMMU code to fix teardown on error
handling code paths.
- Patch for the Intel VT-d driver to fix handling of non-PCI devices
- Fix W=1 compile warning in dma-iommu code
* tag 'iommu-fixes-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
iommu/dma: fix variable 'cookie' set but not used
iommu/vt-d: Unlink device if failed to add to group
iommu: Remove device link to group on failure
iommu/vt-d: Fix adding non-PCI devices to Intel IOMMU
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"Two driver bugfixes, a documentation fix, and a removal of a spec
violation for the bus recovery algorithm in the core"
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: fix bus recovery stop mode timing
i2c: bcm2835: Store pointer to bus clock
dt-bindings: i2c: at91: fix i2c-sda-hold-time-ns documentation for sam9x60
i2c: at91: fix clk_offset for sam9x60
|
