diff options
| author | Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> | 2022-01-31 12:17:58 +0200 |
|---|---|---|
| committer | Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> | 2022-05-05 21:12:49 +0300 |
| commit | 43d677da65689803ab8d9180b1261945d7e714a1 (patch) | |
| tree | b769c1ec10fd55f7934b8350513256bb065dfd78 | |
| parent | 12a5e1dcc724aa13bcb81c3b4df94f081f88962f (diff) | |
arm64: dts: qcom: sm8450: Add description of camera control interfaces
The change adds description of two CCI controllers found on QCOM SM8450.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8450.dtsi | 142 |
1 files changed, 142 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index dc819f2f7651..1da3ab8f46c3 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1012,6 +1012,84 @@ }; }; + cci0: cci@ac15000 { + compatible = "qcom,sm8450-cci"; + reg = <0 0xac15000 0 0x1000>; + interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_0_CLK>, + <&camcc CAM_CC_CCI_0_CLK_SRC>; + clock-names = "camnoc_axi", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-1 = <&cci0_sleep &cci1_sleep>; + pinctrl-names = "default", "sleep"; + + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + cci0_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci0_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + cci1: cci@ac16000 { + compatible = "qcom,sm8450-cci"; + reg = <0 0xac16000 0 0x1000>; + interrupts = <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>; + power-domains = <&camcc TITAN_TOP_GDSC>; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_1_CLK>, + <&camcc CAM_CC_CCI_1_CLK_SRC>; + clock-names = "camnoc_axi", + "slow_ahb_src", + "cpas_ahb", + "cci", + "cci_src"; + pinctrl-0 = <&cci2_default &cci2_default>; + pinctrl-1 = <&cci3_sleep &cci3_sleep>; + pinctrl-names = "default", "sleep"; + + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + cci1_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci1_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + camcc: clock-controller@ade0000 { compatible = "qcom,sm8450-camcc"; reg = <0 0x0ade0000 0 0x20000>; @@ -1071,6 +1149,70 @@ gpio-ranges = <&tlmm 0 0 211>; wakeup-parent = <&pdc>; + cci0_default: cci0-default-state { + /* SDA, SCL */ + pins = "gpio110", "gpio111"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci0_sleep: cci0-sleep-state { + /* SDA, SCL */ + pins = "gpio110", "gpio111"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci1_default: cci1-default-state { + /* SDA, SCL */ + pins = "gpio112", "gpio113"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci1_sleep: cci1-sleep-state { + /* SDA, SCL */ + pins = "gpio112", "gpio113"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci2_default: cci2-default-state { + /* SDA, SCL */ + pins = "gpio114", "gpio115"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci2_sleep: cci2-sleep-state { + /* SDA, SCL */ + pins = "gpio114", "gpio115"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + + cci3_default: cci3-default-state { + /* SDA, SCL */ + pins = "gpio208", "gpio209"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-up; + }; + + cci3_sleep: cci3-sleep-state { + /* SDA, SCL */ + pins = "gpio208", "gpio209"; + function = "cci_i2c"; + drive-strength = <2>; + bias-pull-down; + }; + qup_i2c13_data_clk: qup-i2c13-data-clk { pins = "gpio48", "gpio49"; function = "qup13"; |