diff options
author | Linaro CI <ci_notify@linaro.org> | 2020-11-16 17:18:14 +0000 |
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committer | Linaro CI <ci_notify@linaro.org> | 2020-11-16 17:18:14 +0000 |
commit | 7849314d3d053e1cafa56df56776fd743208fc8a (patch) | |
tree | fb1996a9a3605c76502a3166dddec5167586a8d4 | |
parent | 27caabe4c993d88dbb93c3d2ea60914c97ce18cc (diff) | |
parent | 3bc88d3f6dbd97de7283c54b38a7dcc5a6e59a06 (diff) |
Merge remote-tracking branch 'db820c-fixes/db820c/5.7-rc1' into integration-linux-qcomlt
# Conflicts:
# drivers/clk/qcom/Kconfig
# drivers/clk/qcom/clk-cpu-8996.c
# drivers/soc/qcom/Kconfig
-rw-r--r-- | drivers/clk/qcom/Kconfig | 1 | ||||
-rw-r--r-- | drivers/clk/qcom/clk-cpu-8996.c | 6 |
2 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index b619d861cb2e..b28f1ee00fa7 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -41,6 +41,7 @@ config QCOM_CLK_APCC_MSM8996 tristate "MSM8996 CPU Clock Controller" select QCOM_KRYO_L2_ACCESSORS depends on ARM64 + depends on COMMON_CLK_QCOM help Support for the CPU clock controller on msm8996 devices. Say Y if you want to support CPU clock scaling using CPUfreq diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index 4a4fde8dd12d..50683db99620 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -32,7 +32,9 @@ * * The primary PLL is what drives the CPU clk, except for times * when we are reprogramming the PLL itself (for rate changes) when - * we temporarily switch to an alternate PLL. + * we temporarily switch to an alternate PLL. A subsequent patch adds + * support to switch between primary and alternate PLL during rate + * changes. * * The primary PLL operates on a single VCO range, between 600MHz * and 3GHz. However the CPUs do support OPPs with frequencies @@ -44,6 +46,7 @@ * Primary PLL --> PLL_EARLY --> PMUX(1) --> CPU clk * and for frequencies between 300MHz and 600MHz we follow * Primary PLL --> PLL/2 --> SMUX(1) --> PMUX(0) --> CPU clk + * Support for this is added in a subsequent patch as well. * * ACD stands for Adaptive Clock Distribution and is used to * detect voltage droops. @@ -534,5 +537,6 @@ static struct platform_driver qcom_cpu_clk_msm8996_driver = { }; module_platform_driver(qcom_cpu_clk_msm8996_driver); +MODULE_ALIAS("platform:msm8996-apcc"); MODULE_DESCRIPTION("QCOM MSM8996 CPU Clock Driver"); MODULE_LICENSE("GPL v2"); |