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authorVinod Koul <vkoul@kernel.org>2020-08-24 22:05:58 +0530
committerVinod Koul <vkoul@kernel.org>2020-10-29 09:06:40 +0530
commit5ae5a4c2a57e559a968f85e88910c8509a2e5b84 (patch)
tree41f13caa82c0734df2356e62f7387d5019da1730
parent93462723b9ad4ad5d1e1c93bd917766cc1b53cf9 (diff)
arm64: dts: qcom: sdm845: enable dma for spi
Add dmas propery for spi@880000 and pinconf setting so that we can use dma for this spi device. Also, add iommu properties for qup and spi. Signed-off-by: Vinod Koul <vkoul@kernel.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index c62ea9e41c7c..f2ff24587176 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -12,6 +12,7 @@
#include <dt-bindings/clock/qcom,lpass-sdm845.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
+#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sdm845.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -1142,6 +1143,7 @@
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+ iommus = <&apps_smmu 0x003 0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -1172,6 +1174,9 @@
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
+ <&gpi_dma0 1 0 QCOM_GPI_SPI>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1505,6 +1510,7 @@
clock-names = "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
+ iommus = <&apps_smmu 0x6c3 0x0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -2428,6 +2434,13 @@
"gpio2", "gpio3";
function = "qup0";
};
+
+ config {
+ pins = "gpio0", "gpio1",
+ "gpio2", "gpio3";
+ drive-strength = <6>;
+ bias-disable;
+ };
};
qup_spi1_default: qup-spi1-default {