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author | Linaro CI <ci_notify@linaro.org> | 2020-04-14 09:31:42 +0000 |
---|---|---|
committer | Linaro CI <ci_notify@linaro.org> | 2020-04-14 09:31:42 +0000 |
commit | e95ebdc4b584c32f569692a43f15bfddb926267d (patch) | |
tree | 81751aa0b8f0a09ff50cd774f3ca9d0f30d55293 | |
parent | e5807d85424f8f56bf46d197cd834c898cf38f97 (diff) | |
parent | b07d2b04c2936aaab7a0a87d1563f5a7c997ee58 (diff) |
Merge remote-tracking branch 'sdm845-db845c-dts/tracking-qcomlt-sdm845-db845c-dts' into integration-linux-qcomlt
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 140 |
1 files changed, 140 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index a2e05926b429..572f6c26593f 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -74,6 +74,17 @@ }; }; + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <<9611_out>; + }; + }; + }; + lt9611_1v8: lt9611-vdd18-regulator { compatible = "regulator-fixed"; regulator-name = "LT9611_1V8"; @@ -348,6 +359,53 @@ firmware-name = "qcom/sdm845/cdsp.mdt"; }; +&dsi0 { + status = "okay"; + vdda-supply = <&vreg_l26a_1p2>; + +#if 0 + qcom,dual-dsi-mode; + qcom,master-dsi; +#endif + + ports { + port@1 { + endpoint { + remote-endpoint = <<9611_a>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dsi0_phy { + status = "okay"; + vdds-supply = <&vreg_l1a_0p875>; +}; + +#if 0 +&dsi1 { + status = "okay"; + vdda-supply = <&vreg_l26a_1p2>; + + qcom,dual-dsi-mode; + + ports { + port@1 { + endpoint { + remote-endpoint = <<9611_b>; + data-lanes = <0 1 2 3>; + }; + }; + }; +}; + +&dsi1_phy { + status = "okay"; + vdds-supply = <&vreg_l1a_0p875>; +}; +#endif + &gcc { protected-clocks = <GCC_QSPI_CORE_CLK>, <GCC_QSPI_CORE_CLK_SRC>, @@ -361,6 +419,57 @@ }; }; +&i2c10 { + status = "okay"; + clock-frequency = <400000>; + + hdmi-bridge@3b { + compatible = "lt,lt9611"; + reg = <0x3b>; + + interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; + + reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; + + vdd-supply = <<9611_1v8>; + vcc-supply = <<9611_3v3>; + + pinctrl-names = "default"; + pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + + port@1 { + reg = <1>; + + lt9611_a: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + +#if 0 + port@2 { + reg = <2>; + + lt9611_b: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; +#endif + }; + }; +}; + &i2c11 { /* On Low speed expansion */ label = "LS-I2C1"; @@ -373,6 +482,14 @@ status = "okay"; }; +&mdss { + status = "okay"; +}; + +&mdss_mdp { + status = "okay"; +}; + &mss_pil { status = "okay"; firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; @@ -573,6 +690,21 @@ }; &tlmm { + dsi_sw_sel: dsi-sw-sel { + pins = "gpio120"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + output-high; + }; + + lt9611_irq_pin: lt9611-irq { + pins = "gpio84"; + function = "gpio"; + bias-disable; + }; + pcie0_default_state: pcie0-default { clkreq { pins = "gpio36"; @@ -830,6 +962,14 @@ }; }; +&qup_i2c10_default { + pinconf { + pins = "gpio55", "gpio56"; + drive-strength = <2>; + bias-disable; + }; +}; + &qup_uart6_default { pinmux { pins = "gpio45", "gpio46", "gpio47", "gpio48"; |