diff options
| author | Georgi Djakov <georgi.djakov@linaro.org> | 2016-07-14 15:00:54 +0300 |
|---|---|---|
| committer | Thierry Escande <thierry.escande@linaro.org> | 2019-01-10 10:11:07 +0100 |
| commit | a9f38e7aef4778e3f2bd5fbacfc54755232a72a4 (patch) | |
| tree | 8bbb0fc5f058324e37776891362e6656117b04e4 | |
| parent | 21b34c159cbdcc00a0cab4fd9595b91fe2c76672 (diff) | |
ARM: dts: apq8064: Add references to CPU clocks and regulators
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 902bea623af9..3545c4ee5647 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -43,6 +43,10 @@ qcom,acc = <&acc0>; qcom,saw = <&saw0>; cpu-idle-states = <&CPU_SPC>; + clocks = <&kraitcc 0>, <&kraitcc 4>; + clock-names = "cpu", "l2"; + clock-latency = <100000>; + cpu-supply = <&saw0_regulator>; }; CPU1: cpu@1 { @@ -54,6 +58,10 @@ qcom,acc = <&acc1>; qcom,saw = <&saw1>; cpu-idle-states = <&CPU_SPC>; + clocks = <&kraitcc 1>, <&kraitcc 4>; + clock-names = "cpu", "l2"; + clock-latency = <100000>; + cpu-supply = <&saw1_regulator>; }; CPU2: cpu@2 { @@ -65,6 +73,10 @@ qcom,acc = <&acc2>; qcom,saw = <&saw2>; cpu-idle-states = <&CPU_SPC>; + clocks = <&kraitcc 2>, <&kraitcc 4>; + clock-names = "cpu", "l2"; + clock-latency = <100000>; + cpu-supply = <&saw2_regulator>; }; CPU3: cpu@3 { @@ -76,6 +88,10 @@ qcom,acc = <&acc3>; qcom,saw = <&saw3>; cpu-idle-states = <&CPU_SPC>; + clocks = <&kraitcc 3>, <&kraitcc 4>; + clock-names = "cpu", "l2"; + clock-latency = <100000>; + cpu-supply = <&saw3_regulator>; }; L2: l2-cache { |