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authorBjorn Andersson <bjorn.andersson@linaro.org>2018-06-25 18:25:51 -0700
committerBjorn Andersson <bjorn.andersson@linaro.org>2018-11-06 20:43:22 -0800
commitdc842e7a5dbc39c5b88e05bb4f96ba4de5b4f6b0 (patch)
tree48d3bdac8adbae3f71ee71f127207946b640bea2
parent651022382c7f8da46cb4872a545ee1da6d097d2a (diff)
arm64: dts: qcom: sdm845: Add PAS based ADSP and CDSP
Add nodes necessary to boot the PAS based Audio and Compute cores found in SDM845. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845-mtp.dts8
-rw-r--r--arch/arm64/boot/dts/qcom/sdm845.dtsi68
2 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
index eedfaf8922e2..5f5a9fd9ffdb 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
@@ -440,3 +440,11 @@
bias-pull-up;
};
};
+
+&adsp_pil {
+ status = "okay";
+};
+
+&cdsp_pil {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index b72bdb0a31a5..cbd087ac7ed5 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -87,6 +87,16 @@
reg = <0 0x86200000 0 0x2d00000>;
no-map;
};
+
+ adsp_mem: memory@8b100000 {
+ reg = <0 0x8b100000 0 0x1a00000>;
+ no-map;
+ };
+
+ cdsp_mem: memory@94700000 {
+ reg = <0 0x94700000 0 0x800000>;
+ no-map;
+ };
};
cpus {
@@ -206,6 +216,64 @@
<GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
};
+ adsp_pil: adsp-pil {
+ compatible = "qcom,sdm845-adsp-pas";
+
+ interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&xo_board>;
+ clock-names = "xo";
+
+ memory-region = <&adsp_mem>;
+
+ qcom,smem-states = <&adsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
+ label = "lpass";
+ qcom,remote-pid = <2>;
+ mboxes = <&apss_shared 8>;
+ };
+ };
+
+ cdsp_pil: cdsp-pil {
+ compatible = "qcom,sdm845-cdsp-pas";
+
+ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready",
+ "handover", "stop-ack";
+
+ clocks = <&xo_board>;
+ clock-names = "xo";
+
+ memory-region = <&cdsp_mem>;
+
+ qcom,smem-states = <&cdsp_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;
+ label = "turing";
+ qcom,remote-pid = <5>;
+ mboxes = <&apss_shared 4>;
+ };
+ };
+
clocks {
xo_board: xo-board {
compatible = "fixed-clock";