Gpio: pl061: format modification for gpio dts file

    Change the capital letters to lowercase in address value,
and delete "0x" in gpio node name. besides, remove a redundant
node used by pmic.

Signed-off-by: Yunlei He <heyunlei@huawei.com>

1 files changed, 25 insertions, 28 deletions

diff --git a/arch/arm64/boot/dts/hi6220.dtsi b/arch/arm64/boot/dts/hi6220.dtsi
index be7d1a63d124..3bf0b66b99d0 100644
--- a/arch/arm64/boot/dts/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hi6220.dtsi
@@ -359,7 +359,7 @@
 			pinctrl-single,register-width = <32>;
 		};
 
-		gpio0: gpio@0xf8011000 {
+		gpio0: gpio@f8011000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf8011000 0x0 0x1000>;
 			interrupts = <0 52 0x4>;
@@ -372,7 +372,7 @@
 			status = "ok";
 		};
 
-		gpio1: gpio@0xf8012000 {
+		gpio1: gpio@f8012000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf8012000 0x0 0x1000>;
 			interrupts = <0 53 0x4>;
@@ -385,7 +385,7 @@
 			status = "ok";
 		};
 
-		gpio2: gpio@0xf8013000 {
+		gpio2: gpio@f8013000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf8013000 0x0 0x1000>;
 			interrupts = <0 54 0x4>;
@@ -398,7 +398,7 @@
 			status = "ok";
 		};
 
-		gpio3: gpio@0xf8014000 {
+		gpio3: gpio@f8014000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf8014000 0x0 0x1000>;
 			interrupts = <0 55 0x4>;
@@ -412,7 +412,7 @@
 			status = "ok";
 		};
 
-		gpio4: gpio@0xf7020000 {
+		gpio4: gpio@f7020000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7020000 0x0 0x1000>;
 			interrupts = <0 56 0x4>;
@@ -426,7 +426,7 @@
 			status = "ok";
 		};
 
-		gpio5: gpio@0xf7021000 {
+		gpio5: gpio@f7021000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7021000 0x0 0x1000>;
 			interrupts = <0 57 0x4>;
@@ -440,7 +440,7 @@
 			status = "ok";
 		};
 
-		gpio6: gpio@0xf7022000 {
+		gpio6: gpio@f7022000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7022000 0x0 0x1000>;
 			interrupts = <0 58 0x4>;
@@ -454,7 +454,7 @@
 			status = "ok";
 		};
 
-		gpio7: gpio@0xf7023000 {
+		gpio7: gpio@f7023000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7023000 0x0 0x1000>;
 			interrupts = <0 59 0x4>;
@@ -468,7 +468,7 @@
 			status = "ok";
 		};
 
-		gpio8: gpio@0xf7024000 {
+		gpio8: gpio@f7024000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7024000 0x0 0x1000>;
 			interrupts = <0 60 0x4>;
@@ -482,7 +482,7 @@
 			status = "ok";
 		};
 
-		gpio9: gpio@0xf7025000 {
+		gpio9: gpio@f7025000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7025000 0x0 0x1000>;
 			interrupts = <0 61 0x4>;
@@ -496,7 +496,7 @@
 			status = "ok";
 		};
 
-		gpio10: gpio@0xf7026000 {
+		gpio10: gpio@f7026000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7026000 0x0 0x1000>;
 			interrupts = <0 62 0x4>;
@@ -510,7 +510,7 @@
 			status = "ok";
 		};
 
-		gpio11: gpio@0xf7027000 {
+		gpio11: gpio@f7027000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7027000 0x0 0x1000>;
 			interrupts = <0 63 0x4>;
@@ -524,7 +524,7 @@
 			status = "ok";
 		};
 
-		gpio12: gpio@0xf7028000 {
+		gpio12: gpio@f7028000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7028000 0x0 0x1000>;
 			interrupts = <0 64 0x4>;
@@ -538,7 +538,7 @@
 			status = "ok";
 		};
 
-		gpio13: gpio@0xf7029000 {
+		gpio13: gpio@f7029000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf7029000 0x0 0x1000>;
 			interrupts = <0 65 0x4>;
@@ -552,9 +552,9 @@
 			status = "ok";
 		};
 
-		gpio14: gpio@0xf702A000 {
+		gpio14: gpio@f702a000 {
 			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x0 0xf702A000 0x0 0x1000>;
+			reg = <0x0 0xf702a000 0x0 0x1000>;
 			interrupts = <0 66 0x4>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -566,9 +566,9 @@
 			status = "ok";
 		};
 
-		gpio15: gpio@0xf702B000 {
+		gpio15: gpio@f702b000 {
 			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x0 0xf702B000 0x0 0x1000>;
+			reg = <0x0 0xf702b000 0x0 0x1000>;
 			interrupts = <0 67 0x4>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -584,9 +584,9 @@
 			status = "ok";
 		};
 
-		gpio16: gpio@0xf702C000 {
+		gpio16: gpio@f702c000 {
 			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x0 0xf702C000 0x0 0x1000>;
+			reg = <0x0 0xf702c000 0x0 0x1000>;
 			interrupts = <0 68 0x4>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -598,9 +598,9 @@
 			status = "ok";
 		};
 
-		gpio17: gpio@0xf702D000 {
+		gpio17: gpio@f702d000 {
 			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x0 0xf702D000 0x0 0x1000>;
+			reg = <0x0 0xf702d000 0x0 0x1000>;
 			interrupts = <0 69 0x4>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -612,9 +612,9 @@
 			status = "ok";
 		};
 
-		gpio18: gpio@0xf702E000 {
+		gpio18: gpio@f702e000 {
 			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x0 0xf702E000 0x0 0x1000>;
+			reg = <0x0 0xf702e000 0x0 0x1000>;
 			interrupts = <0 70 0x4>;
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -626,7 +626,7 @@
 			status = "ok";
 		};
 
-		gpio19: gpio@0xf702f000{
+		gpio19: gpio@f702f000 {
 			compatible = "arm,pl061", "arm,primecell";
 			reg = <0x0 0xf702f000 0x0 0x1000>;
 			interrupts = <0 71 0x4>;
@@ -743,9 +743,6 @@
 
 	};
 
-	gpio_pmu_irq_n:gpio_pmu_irq_n {
-		gpios = <&gpio1 2 0>;
-	};
 	pmic: pmic@F8000000 {
                 compatible = "hisilicon,hi6552-pmic-driver";
                 reg = <0x0 0xf8000000 0x0 0x1000>;