diff options
author | Jon Medhurst <tixy@linaro.org> | 2015-09-14 11:40:04 +0100 |
---|---|---|
committer | Jon Medhurst <tixy@linaro.org> | 2015-09-14 11:40:04 +0100 |
commit | 1922cf16f580e0057947add2d6e8fde75cf36c65 (patch) | |
tree | c5cf664b6de4870f9140e3899e3d6313b183ce4e | |
parent | 6ae196a24d5d8a8c1da069fedea6c434a9514ccd (diff) | |
parent | fa38c3ce0619c889c4530037b352787c54cbfd79 (diff) |
Merge branch 'lsk-3.18-armlt-juno-cpuidle' into integration-lsk-3.18-armlt-android
-rw-r--r-- | Documentation/devicetree/bindings/arm/arch_timer.txt | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/arm/juno-base.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/arm/juno-r1.dts | 28 | ||||
-rw-r--r-- | arch/arm64/boot/dts/arm/juno.dts | 28 | ||||
-rw-r--r-- | drivers/clocksource/arm_arch_timer.c | 16 | ||||
-rw-r--r-- | linaro/configs/vexpress64.conf | 1 |
6 files changed, 70 insertions, 8 deletions
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index 37b2cafa4e5..271483595a1 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt @@ -42,6 +42,9 @@ Example: - reg : The control frame base address. +- arm,cnttidr : The value of the CNTTIDR register if not accessible from + the level the kernel is running at. To be used only in extreme cases. + Note that #address-cells, #size-cells, and ranges shall be present to ensure the CPU can address a frame's registers. diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index b09607237b3..458e4a2712a 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -5,11 +5,11 @@ memtimer: timer@2a810000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x2a810000 0x0 0x10000>; + arm,cnttidr = <0x1>; clock-frequency = <50000000>; #address-cells = <2>; #size-cells = <2>; ranges; - status = "disabled"; frame@2a830000 { frame-number = <1>; interrupts = <0 60 4>; diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts index 69130840c6c..4dac97e0c65 100644 --- a/arch/arm64/boot/dts/arm/juno-r1.dts +++ b/arch/arm64/boot/dts/arm/juno-r1.dts @@ -60,12 +60,35 @@ }; }; + idle-states { + entry-method = "arm,psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <100>; + exit-latency-us = <250>; + min-residency-us = <2000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1010000>; + local-timer-stop; + entry-latency-us = <800>; + exit-latency-us = <700>; + min-residency-us = <2500>; + }; + }; + A57_0: cpu@0 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x0 0x0>; device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A57_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A57_1: cpu@1 { @@ -74,6 +97,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A57_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_0: cpu@100 { @@ -82,6 +106,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_1: cpu@101 { @@ -90,6 +115,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_2: cpu@102 { @@ -98,6 +124,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_3: cpu@103 { @@ -106,6 +133,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A57_L2: l2-cache0 { diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index ce1128a54c8..df668e14e78 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -60,12 +60,35 @@ }; }; + idle-states { + entry-method = "arm,psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <100>; + exit-latency-us = <250>; + min-residency-us = <2000>; + }; + + CLUSTER_SLEEP_0: cluster-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1010000>; + local-timer-stop; + entry-latency-us = <800>; + exit-latency-us = <700>; + min-residency-us = <2500>; + }; + }; + A57_0: cpu@0 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x0 0x0>; device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A57_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A57_1: cpu@1 { @@ -74,6 +97,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A57_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_0: cpu@100 { @@ -82,6 +106,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_1: cpu@101 { @@ -90,6 +115,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_2: cpu@102 { @@ -98,6 +124,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A53_3: cpu@103 { @@ -106,6 +133,7 @@ device_type = "cpu"; enable-method = "psci"; next-level-cache = <&A53_L2>; + cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; }; A57_L2: l2-cache0 { diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 84b4c8b7fbd..b593b98d700 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -738,14 +738,16 @@ static void __init arch_timer_mem_init(struct device_node *np) u32 cnttidr; arch_timers_present |= ARCH_MEM_TIMER; - cntctlbase = of_iomap(np, 0); - if (!cntctlbase) { - pr_err("arch_timer: Can't find CNTCTLBase\n"); - return; - } + if (of_property_read_u32(np, "arm,cnttidr", &cnttidr)) { + cntctlbase = of_iomap(np, 0); + if (!cntctlbase) { + pr_err("arch_timer: Can't find CNTCTLBase\n"); + return; + } - cnttidr = readl_relaxed(cntctlbase + CNTTIDR); - iounmap(cntctlbase); + cnttidr = readl_relaxed(cntctlbase + CNTTIDR); + iounmap(cntctlbase); + } /* * Try to find a virtual capable frame. Otherwise fall back to a diff --git a/linaro/configs/vexpress64.conf b/linaro/configs/vexpress64.conf index 7c35366b28f..461f9264271 100644 --- a/linaro/configs/vexpress64.conf +++ b/linaro/configs/vexpress64.conf @@ -46,3 +46,4 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_NOP_USB_XCEIV=y CONFIG_USB_OHCI_HCD=y +CONFIG_ARM64_CPUIDLE=y |