From eca15296a9c2a5d5d7d8281a710ba4bd0c2e7cd3 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Dec 2012 12:52:06 +1000 Subject: drm/nve0/graph: fix fuc, and enable acceleration on all known chipsets Also adds GK106 to chipsets known by ucode. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc') diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc index 138eeaa2866..7fe9d7cf486 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc +++ b/drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc @@ -44,6 +44,9 @@ chipsets: .b8 0xe7 0 0 0 .b16 #nve4_hub_mmio_head .b16 #nve4_hub_mmio_tail +.b8 0xe6 0 0 0 +.b16 #nve4_hub_mmio_head +.b16 #nve4_hub_mmio_tail .b8 0 0 0 0 nve4_hub_mmio_head: @@ -680,6 +683,16 @@ ctx_mmio_exec: // on load it means: "a save preceeded this load" // ctx_xfer: + // according to mwk, some kind of wait for idle + mov $r15 0xc00 + shl b32 $r15 6 + mov $r14 4 + iowr I[$r15 + 0x200] $r14 + ctx_xfer_idle: + iord $r14 I[$r15 + 0x000] + and $r14 0x2000 + bra ne #ctx_xfer_idle + bra not $p1 #ctx_xfer_pre bra $p2 #ctx_xfer_pre_load ctx_xfer_pre: -- cgit v1.2.3