From 856ac3c6e0c4cb566014edf5fa185b962298db88 Mon Sep 17 00:00:00 2001 From: Yong Zhang Date: Thu, 19 Jul 2012 09:13:53 +0200 Subject: MIPS: BMIPS: delay irq enable to ->smp_finish() To prepare for smoothing set_cpu_[active|online]() mess up Signed-off-by: Yong Zhang Cc: Sergei Shtylyov Cc: David Daney Acked-by: David Daney Patchwork: https://patchwork.linux-mips.org/patch/3846/ Signed-off-by: Ralf Baechle --- arch/mips/kernel/smp-bmips.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c index 32fe9254d94..8e393b8443f 100644 --- a/arch/mips/kernel/smp-bmips.c +++ b/arch/mips/kernel/smp-bmips.c @@ -196,13 +196,6 @@ static void bmips_init_secondary(void) write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0)); #endif - - /* make sure there won't be a timer interrupt for a little while */ - write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ); - - irq_enable_hazard(); - set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE); - irq_enable_hazard(); } /* @@ -211,6 +204,13 @@ static void bmips_init_secondary(void) static void bmips_smp_finish(void) { pr_info("SMP: CPU%d is running\n", smp_processor_id()); + + /* make sure there won't be a timer interrupt for a little while */ + write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ); + + irq_enable_hazard(); + set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE); + irq_enable_hazard(); } /* -- cgit v1.2.3