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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/m32r/mm/cache.c
downloadconfigs-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.gz
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/m32r/mm/cache.c')
-rw-r--r--arch/m32r/mm/cache.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/m32r/mm/cache.c b/arch/m32r/mm/cache.c
new file mode 100644
index 00000000000..31b0789c199
--- /dev/null
+++ b/arch/m32r/mm/cache.c
@@ -0,0 +1,65 @@
+/*
+ * linux/arch/m32r/mm/cache.c
+ *
+ * Copyright (C) 2002 Hirokazu Takata
+ */
+
+#include <linux/config.h>
+#include <asm/pgtable.h>
+
+#undef MCCR
+
+#if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP)
+/* Cache Control Register */
+#define MCCR ((volatile unsigned long*)0xfffffffc)
+#define MCCR_CC (1UL << 7) /* Cache mode modify bit */
+#define MCCR_IIV (1UL << 6) /* I-cache invalidate */
+#define MCCR_DIV (1UL << 5) /* D-cache invalidate */
+#define MCCR_DCB (1UL << 4) /* D-cache copy back */
+#define MCCR_ICM (1UL << 1) /* I-cache mode [0:off,1:on] */
+#define MCCR_DCM (1UL << 0) /* D-cache mode [0:off,1:on] */
+#define MCCR_ICACHE_INV (MCCR_CC|MCCR_IIV)
+#define MCCR_DCACHE_CB (MCCR_CC|MCCR_DCB)
+#define MCCR_DCACHE_CBINV (MCCR_CC|MCCR_DIV|MCCR_DCB)
+#define CHECK_MCCR(mccr) (mccr = *MCCR)
+#elif defined(CONFIG_CHIP_M32102)
+#define MCCR ((volatile unsigned char*)0xfffffffe)
+#define MCCR_IIV (1UL << 0) /* I-cache invalidate */
+#define MCCR_ICACHE_INV MCCR_IIV
+#endif /* CONFIG_CHIP_XNUX2 || CONFIG_CHIP_M32700 */
+
+#ifndef MCCR
+#error Unknown cache type.
+#endif
+
+
+/* Copy back and invalidate D-cache and invalidate I-cache all */
+void _flush_cache_all(void)
+{
+#if defined(CONFIG_CHIP_M32102)
+ *MCCR = MCCR_ICACHE_INV;
+#else
+ unsigned long mccr;
+
+ /* Copyback and invalidate D-cache */
+ /* Invalidate I-cache */
+ *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CBINV;
+ while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
+#endif
+}
+
+/* Copy back D-cache and invalidate I-cache all */
+void _flush_cache_copyback_all(void)
+{
+#if defined(CONFIG_CHIP_M32102)
+ *MCCR = MCCR_ICACHE_INV;
+#else
+ unsigned long mccr;
+
+ /* Copyback D-cache */
+ /* Invalidate I-cache */
+ *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CB;
+ while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
+
+#endif
+}