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authorLinus Torvalds <torvalds@linux-foundation.org>2010-05-06 08:38:03 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-06 08:38:03 -0700
commit325ce9e3060960488fa2c1c9eccde5ad85d75e7c (patch)
tree836f4aebacd0741f02647986b386fdd0ac58a69d /arch/arm/mach-pxa/include/mach/regs-u2d.h
parentbbfdbe9dc00dc3fd6cba9b0f96adc46d025c9079 (diff)
parent257dab81413b31b8648becfe11586b3a41e5c29a (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] pxa/colibri: fix missing #include <mach/mfp.h> in colibri.h [ARM] pxa/spitz: fix On/off key name to fix warning during boot [ARM] pxa: fix the incorrect cpu_is_pxa950() [ARM] pxa: update cpuid pattern for pxa9xx in head.S [ARM] pxa/viper: fix timeout usage for I2C [ARM] pxa/raumfeld: fix button name [ARM] pxa/imote2: Fix iMote2 defconfig [ARM] pxa: add missing new line to regs-u2d.h ARM: 6093/1: Fix kernel memory printing for sparsemem arch/arm/include/asm/elf.h: forward-declare the task-struct arch/arm/plat-pxa/dma.c: correct NULL test ARM: 6076/1: SA1100: add processor check to sa1110-cpufreq driver ARM: 6075/1: SA1100: fix wrong CPU type for h3100 and h3600 ARM: Update mach-types ARM: 6066/1: Fix "BUG: scheduling while atomic: swapper/0/0x00000002 ARM: 6068/1: Fix build break with KPROBES enabled mx5: Fix build error for mx51_defconfig
Diffstat (limited to 'arch/arm/mach-pxa/include/mach/regs-u2d.h')
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-u2d.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/include/mach/regs-u2d.h b/arch/arm/mach-pxa/include/mach/regs-u2d.h
index 44b0b20b69a..c15c0c57de0 100644
--- a/arch/arm/mach-pxa/include/mach/regs-u2d.h
+++ b/arch/arm/mach-pxa/include/mach/regs-u2d.h
@@ -166,7 +166,8 @@
#define U2DMACSR_BUSERRTYPE (7 << 10) /* PX Bus Error Type */
#define U2DMACSR_EORINTR (1 << 9) /* End Of Receive */
#define U2DMACSR_REQPEND (1 << 8) /* Request Pending */
-#define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */
+#define U2DMACSR_RASINTR (1 << 4) /* Request After Channel Stopped (read / write 1 clear) */
+#define U2DMACSR_STOPINTR (1 << 3) /* Stop Interrupt (read only) */
#define U2DMACSR_ENDINTR (1 << 2) /* End Interrupt (read / write 1 clear) */
#define U2DMACSR_STARTINTR (1 << 1) /* Start Interrupt (read / write 1 clear) */
#define U2DMACSR_BUSERRINTR (1 << 0) /* Bus Error Interrupt (read / write 1 clear) */