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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/arm/mach-iop3xx/iop321-setup.c
downloadconfigs-2.6.12-rc2.tar.gz
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/arm/mach-iop3xx/iop321-setup.c')
-rw-r--r--arch/arm/mach-iop3xx/iop321-setup.c169
1 files changed, 169 insertions, 0 deletions
diff --git a/arch/arm/mach-iop3xx/iop321-setup.c b/arch/arm/mach-iop3xx/iop321-setup.c
new file mode 100644
index 00000000000..bf23e0fd284
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+++ b/arch/arm/mach-iop3xx/iop321-setup.c
@@ -0,0 +1,169 @@
+/*
+ * linux/arch/arm/mach-iop3xx/iop321-setup.c
+ *
+ * Author: Nicolas Pitre <nico@cam.org>
+ * Copyright (C) 2001 MontaVista Software, Inc.
+ * Copyright (C) 2004 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/major.h>
+#include <linux/fs.h>
+#include <linux/device.h>
+#include <linux/serial.h>
+#include <linux/tty.h>
+#include <linux/serial_core.h>
+
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/mach/map.h>
+#include <asm/setup.h>
+#include <asm/system.h>
+#include <asm/memory.h>
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#define IOP321_UART_XTAL 1843200
+
+/*
+ * Standard IO mapping for all IOP321 based systems
+ */
+static struct map_desc iop321_std_desc[] __initdata = {
+ /* virtual physical length type */
+
+ /* mem mapped registers */
+ { IOP321_VIRT_MEM_BASE, IOP321_PHYS_MEM_BASE, 0x00002000, MT_DEVICE },
+
+ /* PCI IO space */
+ { IOP321_PCI_LOWER_IO_VA, IOP321_PCI_LOWER_IO_PA, IOP321_PCI_IO_WINDOW_SIZE, MT_DEVICE }
+};
+
+#ifdef CONFIG_ARCH_IQ80321
+#define UARTBASE IQ80321_UART
+#define IRQ_UART IRQ_IQ80321_UART
+#endif
+
+#ifdef CONFIG_ARCH_IQ31244
+#define UARTBASE IQ31244_UART
+#define IRQ_UART IRQ_IQ31244_UART
+#endif
+
+static struct uart_port iop321_serial_ports[] = {
+ {
+ .membase = (char*)(UARTBASE),
+ .mapbase = (UARTBASE),
+ .irq = IRQ_UART,
+ .flags = UPF_SKIP_TEST,
+ .iotype = UPIO_MEM,
+ .regshift = 0,
+ .uartclk = IOP321_UART_XTAL,
+ .line = 0,
+ .type = PORT_16550A,
+ .fifosize = 16
+ }
+};
+
+static struct resource iop32x_i2c_0_resources[] = {
+ [0] = {
+ .start = 0xfffff680,
+ .end = 0xfffff698,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IOP321_I2C_0,
+ .end = IRQ_IOP321_I2C_0,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+static struct resource iop32x_i2c_1_resources[] = {
+ [0] = {
+ .start = 0xfffff6a0,
+ .end = 0xfffff6b8,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_IOP321_I2C_1,
+ .end = IRQ_IOP321_I2C_1,
+ .flags = IORESOURCE_IRQ
+ }
+};
+
+static struct platform_device iop32x_i2c_0_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 0,
+ .num_resources = 2,
+ .resource = iop32x_i2c_0_resources
+};
+
+static struct platform_device iop32x_i2c_1_controller = {
+ .name = "IOP3xx-I2C",
+ .id = 1,
+ .num_resources = 2,
+ .resource = iop32x_i2c_1_resources
+};
+
+static struct platform_device *iop32x_devices[] __initdata = {
+ &iop32x_i2c_0_controller,
+ &iop32x_i2c_1_controller
+};
+
+void __init iop32x_init(void)
+{
+ if(iop_is_321())
+ {
+ platform_add_devices(iop32x_devices,
+ ARRAY_SIZE(iop32x_devices));
+ }
+}
+
+void __init iop321_map_io(void)
+{
+ iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
+ early_serial_setup(&iop321_serial_ports[0]);
+}
+
+#ifdef CONFIG_ARCH_IQ80321
+extern void iq80321_map_io(void);
+extern struct sys_timer iop321_timer;
+extern void iop321_init_time(void);
+#endif
+
+#ifdef CONFIG_ARCH_IQ31244
+extern void iq31244_map_io(void);
+extern struct sys_timer iop321_timer;
+extern void iop321_init_time(void);
+#endif
+
+#if defined(CONFIG_ARCH_IQ80321)
+MACHINE_START(IQ80321, "Intel IQ80321")
+ MAINTAINER("Intel Corporation")
+ BOOT_MEM(PHYS_OFFSET, IQ80321_UART, IQ80321_UART)
+ MAPIO(iq80321_map_io)
+ INITIRQ(iop321_init_irq)
+ .timer = &iop321_timer,
+ BOOT_PARAMS(0xa0000100)
+ INIT_MACHINE(iop32x_init)
+MACHINE_END
+#elif defined(CONFIG_ARCH_IQ31244)
+MACHINE_START(IQ31244, "Intel IQ31244")
+ MAINTAINER("Intel Corp.")
+ BOOT_MEM(PHYS_OFFSET, IQ31244_UART, IQ31244_UART)
+ MAPIO(iq31244_map_io)
+ INITIRQ(iop321_init_irq)
+ .timer = &iop321_timer,
+ BOOT_PARAMS(0xa0000100)
+ INIT_MACHINE(iop32x_init)
+MACHINE_END
+#else
+#error No machine descriptor defined for this IOP3XX implementation
+#endif